in CMake-armcc/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c [2044:2172]
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
uint32_t BreakInput,
TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
{
uint32_t tmporx;
uint32_t bkin_enable_mask;
uint32_t bkin_polarity_mask;
uint32_t bkin_enable_bitpos;
uint32_t bkin_polarity_bitpos;
/* Check the parameters */
assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
assert_param(IS_TIM_BREAKINPUT(BreakInput));
assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
#if defined(DFSDM1_Channel0)
if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
{
assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
}
#else
assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
#endif /* DFSDM1_Channel0 */
/* Check input state */
__HAL_LOCK(htim);
switch (sBreakInputConfig->Source)
{
case TIM_BREAKINPUTSOURCE_BKIN:
{
bkin_enable_mask = TIM1_OR2_BKINE;
bkin_enable_bitpos = TIM1_OR2_BKINE_Pos;
bkin_polarity_mask = TIM1_OR2_BKINP;
bkin_polarity_bitpos = TIM1_OR2_BKINP_Pos;
break;
}
case TIM_BREAKINPUTSOURCE_COMP1:
{
bkin_enable_mask = TIM1_OR2_BKCMP1E;
bkin_enable_bitpos = TIM1_OR2_BKCMP1E_Pos;
bkin_polarity_mask = TIM1_OR2_BKCMP1P;
bkin_polarity_bitpos = TIM1_OR2_BKCMP1P_Pos;
break;
}
case TIM_BREAKINPUTSOURCE_COMP2:
{
bkin_enable_mask = TIM1_OR2_BKCMP2E;
bkin_enable_bitpos = TIM1_OR2_BKCMP2E_Pos;
bkin_polarity_mask = TIM1_OR2_BKCMP2P;
bkin_polarity_bitpos = TIM1_OR2_BKCMP2P_Pos;
break;
}
#if defined(DFSDM1_Channel0)
case TIM_BREAKINPUTSOURCE_DFSDM1:
{
bkin_enable_mask = TIM1_OR2_BKDF1BK0E;
bkin_enable_bitpos = 8U;
bkin_polarity_mask = 0U;
bkin_polarity_bitpos = 0U;
break;
}
#endif /* DFSDM1_Channel0 */
default:
{
bkin_enable_mask = 0U;
bkin_polarity_mask = 0U;
bkin_enable_bitpos = 0U;
bkin_polarity_bitpos = 0U;
break;
}
}
switch (BreakInput)
{
case TIM_BREAKINPUT_BRK:
{
/* Get the TIMx_OR2 register value */
tmporx = htim->Instance->OR2;
/* Enable the break input */
tmporx &= ~bkin_enable_mask;
tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
/* Set the break input polarity */
#if defined(DFSDM1_Channel0)
if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
#endif /* DFSDM1_Channel0 */
{
tmporx &= ~bkin_polarity_mask;
tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
}
/* Set TIMx_OR2 */
htim->Instance->OR2 = tmporx;
break;
}
case TIM_BREAKINPUT_BRK2:
{
/* Get the TIMx_OR3 register value */
tmporx = htim->Instance->OR3;
/* Enable the break input */
tmporx &= ~bkin_enable_mask;
tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
/* Set the break input polarity */
#if defined(DFSDM1_Channel0)
if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
#endif /* DFSDM1_Channel0 */
{
tmporx &= ~bkin_polarity_mask;
tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
}
/* Set TIMx_OR3 */
htim->Instance->OR3 = tmporx;
break;
}
default:
break;
}
__HAL_UNLOCK(htim);
return HAL_OK;
}