in CMake-armcc/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c [5038:5164]
static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
{
uint32_t tmpoptions = hi2c->XferOptions;
uint32_t treatdmanack = 0U;
HAL_I2C_StateTypeDef tmpstate;
/* Process locked */
__HAL_LOCK(hi2c);
/* Check if STOPF is set */
if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
{
/* Call I2C Slave complete process */
I2C_ITSlaveCplt(hi2c, ITFlags);
}
if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
{
/* Check that I2C transfer finished */
/* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
/* Mean XferCount == 0 */
/* So clear Flag NACKF only */
if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) ||
(I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET))
{
/* Split check of hdmarx, for MISRA compliance */
if (hi2c->hdmarx != NULL)
{
if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)
{
if (__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U)
{
treatdmanack = 1U;
}
}
}
/* Split check of hdmatx, for MISRA compliance */
if (hi2c->hdmatx != NULL)
{
if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET)
{
if (__HAL_DMA_GET_COUNTER(hi2c->hdmatx) == 0U)
{
treatdmanack = 1U;
}
}
}
if (treatdmanack == 1U)
{
/* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */
if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME))
{
/* Call I2C Listen complete process */
I2C_ITListenCplt(hi2c, ITFlags);
}
else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME))
{
/* Clear NACK Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
/* Flush TX register */
I2C_Flush_TXDR(hi2c);
/* Last Byte is Transmitted */
/* Call I2C Slave Sequential complete process */
I2C_ITSlaveSeqCplt(hi2c);
}
else
{
/* Clear NACK Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
}
}
else
{
/* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
/* Clear NACK Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
/* Set ErrorCode corresponding to a Non-Acknowledge */
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
/* Store current hi2c->State, solve MISRA2012-Rule-13.5 */
tmpstate = hi2c->State;
if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME))
{
if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN))
{
hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
}
else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN))
{
hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
}
else
{
/* Do nothing */
}
/* Call the corresponding callback to inform upper layer of End of Transfer */
I2C_ITError(hi2c, hi2c->ErrorCode);
}
}
}
else
{
/* Only Clear NACK Flag, no DMA treatment is pending */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
}
}
else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))
{
I2C_ITAddrCplt(hi2c, ITFlags);
}
else
{
/* Nothing to do */
}
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
return HAL_OK;
}