in CMake-armcc/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c [4834:5004]
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength)
{
/* Check the parameters */
assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
if (htim->DMABurstState == HAL_DMA_BURST_STATE_BUSY)
{
return HAL_BUSY;
}
else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY)
{
if ((BurstBuffer == NULL) && (BurstLength > 0U))
{
return HAL_ERROR;
}
else
{
htim->DMABurstState = HAL_DMA_BURST_STATE_BUSY;
}
}
else
{
/* nothing to do */
}
switch (BurstRequestSrc)
{
case TIM_DMA_UPDATE:
{
/* Set the DMA Period elapsed callbacks */
htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
htim->hdma[TIM_DMA_ID_UPDATE]->XferHalfCpltCallback = TIM_DMAPeriodElapsedHalfCplt;
/* Set the DMA error callback */
htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
break;
}
case TIM_DMA_CC1:
{
/* Set the DMA capture callbacks */
htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
/* Set the DMA error callback */
htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
break;
}
case TIM_DMA_CC2:
{
/* Set the DMA capture callbacks */
htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
/* Set the DMA error callback */
htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
break;
}
case TIM_DMA_CC3:
{
/* Set the DMA capture callbacks */
htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
/* Set the DMA error callback */
htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
break;
}
case TIM_DMA_CC4:
{
/* Set the DMA capture callbacks */
htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
/* Set the DMA error callback */
htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
break;
}
case TIM_DMA_COM:
{
/* Set the DMA commutation callbacks */
htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
/* Set the DMA error callback */
htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
break;
}
case TIM_DMA_TRIGGER:
{
/* Set the DMA trigger callbacks */
htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
htim->hdma[TIM_DMA_ID_TRIGGER]->XferHalfCpltCallback = TIM_DMATriggerHalfCplt;
/* Set the DMA error callback */
htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
/* Enable the DMA channel */
if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer,
DataLength) != HAL_OK)
{
/* Return error status */
return HAL_ERROR;
}
break;
}
default:
break;
}
/* Configure the DMA Burst Mode */
htim->Instance->DCR = (BurstBaseAddress | BurstLength);
/* Enable the TIM DMA Request */
__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
/* Return function status */
return HAL_OK;
}