HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear()

in CMake-armcc/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c [5129:5281]
122 lines of code
17 McCabe index (conditional complexity)

HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
                                           TIM_ClearInputConfigTypeDef *sClearInputConfig,
                                           uint32_t Channel)
{
  /* Check the parameters */
  assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
  assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));

  /* Process Locked */
  __HAL_LOCK(htim);

  htim->State = HAL_TIM_STATE_BUSY;

  switch (sClearInputConfig->ClearInputSource)
  {
    case TIM_CLEARINPUTSOURCE_NONE:
    {
      /* Clear the OCREF clear selection bit and the the ETR Bits */
      CLEAR_BIT(htim->Instance->SMCR, (TIM_SMCR_OCCS | TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP));
      break;
    }
    case TIM_CLEARINPUTSOURCE_OCREFCLR:
    {
      /* Clear the OCREF clear selection bit */
      CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
    }
    break;

    case TIM_CLEARINPUTSOURCE_ETR:
    {
      /* Check the parameters */
      assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
      assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
      assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));

      /* When OCRef clear feature is used with ETR source, ETR prescaler must be off */
      if (sClearInputConfig->ClearInputPrescaler != TIM_CLEARINPUTPRESCALER_DIV1)
      {
        htim->State = HAL_TIM_STATE_READY;
        __HAL_UNLOCK(htim);
        return HAL_ERROR;
      }

      TIM_ETR_SetConfig(htim->Instance,
                        sClearInputConfig->ClearInputPrescaler,
                        sClearInputConfig->ClearInputPolarity,
                        sClearInputConfig->ClearInputFilter);

      /* Set the OCREF clear selection bit */
      SET_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
      break;
    }

    default:
      break;
  }

  switch (Channel)
  {
    case TIM_CHANNEL_1:
    {
      if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
      {
        /* Enable the OCREF clear feature for Channel 1 */
        SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
      }
      else
      {
        /* Disable the OCREF clear feature for Channel 1 */
        CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE);
      }
      break;
    }
    case TIM_CHANNEL_2:
    {
      if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
      {
        /* Enable the OCREF clear feature for Channel 2 */
        SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
      }
      else
      {
        /* Disable the OCREF clear feature for Channel 2 */
        CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE);
      }
      break;
    }
    case TIM_CHANNEL_3:
    {
      if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
      {
        /* Enable the OCREF clear feature for Channel 3 */
        SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
      }
      else
      {
        /* Disable the OCREF clear feature for Channel 3 */
        CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE);
      }
      break;
    }
    case TIM_CHANNEL_4:
    {
      if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
      {
        /* Enable the OCREF clear feature for Channel 4 */
        SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
      }
      else
      {
        /* Disable the OCREF clear feature for Channel 4 */
        CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
      }
      break;
    }
    case TIM_CHANNEL_5:
    {
      if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
      {
        /* Enable the OCREF clear feature for Channel 5 */
        SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE);
      }
      else
      {
        /* Disable the OCREF clear feature for Channel 5 */
        CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE);
      }
      break;
    }
    case TIM_CHANNEL_6:
    {
      if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
      {
        /* Enable the OCREF clear feature for Channel 6 */
        SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE);
      }
      else
      {
        /* Disable the OCREF clear feature for Channel 6 */
        CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE);
      }
      break;
    }
    default:
      break;
  }

  htim->State = HAL_TIM_STATE_READY;

  __HAL_UNLOCK(htim);

  return HAL_OK;
}