in Drivers/STM32U5xx_HAL/Src/stm32u5xx_hal_rcc_ex.c [1436:2382]
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
{
PLL1_ClocksTypeDef pll1_clocks;
PLL2_ClocksTypeDef pll2_clocks;
PLL3_ClocksTypeDef pll3_clocks;
uint32_t frequency;
uint32_t srcclk;
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
if (PeriphClk == RCC_PERIPHCLK_RTC)
{
/* Get the current RTC source */
srcclk = __HAL_RCC_GET_RTC_SOURCE();
/* Check if LSE is ready and if RTC clock selection is LSE */
if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_RTCCLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Check if LSI is ready and if RTC clock selection is LSI */
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSIRDY)) && (srcclk == RCC_RTCCLKSOURCE_LSI))
{
if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSIPREDIV))
{
frequency = LSI_VALUE / 128U;
}
else
{
frequency = LSI_VALUE;
}
}
/* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (srcclk == RCC_RTCCLKSOURCE_HSE_DIV32))
{
frequency = HSE_VALUE / 32U;
}
/* Clock not enabled for RTC*/
else
{
frequency = 0U;
}
}
else
{
/* Other external peripheral clock source than RTC */
switch (PeriphClk)
{
case RCC_PERIPHCLK_SAI1:
srcclk = __HAL_RCC_GET_SAI1_SOURCE();
switch (srcclk)
{
case RCC_SAI1CLKSOURCE_PLL1: /* PLL1P is the clock source for SAI1 */
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_P_Frequency;
break;
case RCC_SAI1CLKSOURCE_PLL2: /* PLL2P is the clock source for SAI1 */
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
frequency = pll2_clocks.PLL2_P_Frequency;
break;
case RCC_SAI1CLKSOURCE_PLL3: /* PLLI3P is the clock source for SAI1 */
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
frequency = pll3_clocks.PLL3_P_Frequency;
break;
case RCC_SAI1CLKSOURCE_PIN:
frequency = EXTERNAL_SAI1_CLOCK_VALUE;
break;
case RCC_SAI1CLKSOURCE_HSI: /* HSI is the clock source for SAI1 */
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
{
frequency = HSI_VALUE;
}
else
{
frequency = 0U;
}
break;
default :
{
frequency = 0U;
break;
}
}
break;
case RCC_PERIPHCLK_SAI2:
srcclk = __HAL_RCC_GET_SAI2_SOURCE();
switch (srcclk)
{
case RCC_SAI2CLKSOURCE_PLL1: /* PLL1P is the clock source for SAI1 */
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_P_Frequency;
break;
case RCC_SAI2CLKSOURCE_PLL2: /* PLL2P is the clock source for SAI1 */
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
frequency = pll2_clocks.PLL2_P_Frequency;
break;
case RCC_SAI2CLKSOURCE_PLL3: /* PLLI3P is the clock source for SAI1 */
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
frequency = pll3_clocks.PLL3_P_Frequency;
break;
case RCC_SAI2CLKSOURCE_PIN:
frequency = EXTERNAL_SAI1_CLOCK_VALUE;
break;
case RCC_SAI2CLKSOURCE_HSI: /* HSI is the clock source for SAI1 */
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
{
frequency = HSI_VALUE;
}
else
{
frequency = 0U;
}
break;
default :
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_SAES:
/* Get the current SAES source */
srcclk = __HAL_RCC_GET_SAES_SOURCE();
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY) && (srcclk == RCC_SAESCLKSOURCE_SHSI))
{
frequency = HSI_VALUE;
}
else if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY) && (srcclk == RCC_SAESCLKSOURCE_SHSI_DIV2))
{
frequency = HSI_VALUE >> 1U;
}
/* Clock not enabled for SAES */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_CLK48:
srcclk = __HAL_RCC_GET_CLK48_SOURCE();
switch (srcclk)
{
case RCC_CLK48CLKSOURCE_PLL1: /* PLL1Q */
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_Q_Frequency;
break;
case RCC_CLK48CLKSOURCE_PLL2: /* PLL2Q */
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
frequency = pll2_clocks.PLL2_Q_Frequency;
break;
case RCC_CLK48CLKSOURCE_HSI48: /* HSI48 */
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSI48RDY))
{
frequency = HSI48_VALUE;
}
else
{
frequency = 0U;
}
break;
case RCC_CLK48CLKSOURCE_MSIK: /* MSIK frequency range in HZ */
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
default :
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_SDMMC:
srcclk = __HAL_RCC_GET_SDMMC_SOURCE();
if (srcclk == RCC_SDMMCCLKSOURCE_CLK48)
{
srcclk = __HAL_RCC_GET_CLK48_SOURCE();
switch (srcclk)
{
case RCC_CLK48CLKSOURCE_PLL1: /* PLL1Q */
{
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_Q_Frequency;
break;
}
case RCC_CLK48CLKSOURCE_PLL2: /* PLL2Q */
{
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
frequency = pll2_clocks.PLL2_Q_Frequency;
break;
}
case RCC_CLK48CLKSOURCE_HSI48: /* HSI48 */
{
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSI48RDY))
{
frequency = HSI48_VALUE;
}
else
{
frequency = 0U;
}
break;
}
case RCC_CLK48CLKSOURCE_MSIK: /* MSIK frequency range in HZ */
{
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
}
default :
{
frequency = 0U;
break;
}
}
break;
}
else if (srcclk == RCC_SDMMCCLKSOURCE_PLL1)
{
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_P_Frequency;
}
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_USART1:
/* Get the current USART1 source */
srcclk = __HAL_RCC_GET_USART1_SOURCE();
if (srcclk == RCC_USART1CLKSOURCE_PCLK2)
{
frequency = HAL_RCC_GetPCLK2Freq();
}
else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_USART1CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_USART1CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for USART1 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_USART2:
/* Get the current USART2 source */
srcclk = __HAL_RCC_GET_USART2_SOURCE();
if (srcclk == RCC_USART2CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_USART2CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_USART2CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for USART2 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_USART3:
/* Get the current USART3 source */
srcclk = __HAL_RCC_GET_USART3_SOURCE();
if (srcclk == RCC_USART3CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_USART3CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_USART3CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for USART3 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_UART4:
/* Get the current UART4 source */
srcclk = __HAL_RCC_GET_UART4_SOURCE();
if (srcclk == RCC_UART4CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if (srcclk == RCC_UART4CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_UART4CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_UART4CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for UART4 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_UART5:
/* Get the current UART5 source */
srcclk = __HAL_RCC_GET_UART5_SOURCE();
if (srcclk == RCC_UART5CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if (srcclk == RCC_UART5CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_UART5CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_UART5CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for UART5 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_LPUART1:
/* Get the current LPUART1 source */
srcclk = __HAL_RCC_GET_LPUART1_SOURCE();
if (srcclk == RCC_LPUART1CLKSOURCE_PCLK3)
{
frequency = HAL_RCC_GetPCLK3Freq();
}
else if (srcclk == RCC_LPUART1CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_LPUART1CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_LPUART1CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIKRDY)) && (srcclk == RCC_LPUART1CLKSOURCE_MSIK))
{
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
}
/* Clock not enabled for LPUART1 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_ADCDAC:
srcclk = __HAL_RCC_GET_ADCDAC_SOURCE();
if (srcclk == RCC_ADCDACCLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if (srcclk == RCC_ADCDACCLKSOURCE_PLL2)
{
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
frequency = pll2_clocks.PLL2_R_Frequency;
}
else if (srcclk == RCC_ADCDACCLKSOURCE_HCLK)
{
frequency = HAL_RCC_GetHCLKFreq();
break;
}
else if (srcclk == RCC_ADCDACCLKSOURCE_MSIK)
{
frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> RCC_ICSCR1_MSISRANGE_Pos)];
break;
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (srcclk == RCC_ADCDACCLKSOURCE_HSE))
{
frequency = HSE_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_ADCDACCLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
/* Clock not enabled for ADC */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_MDF1:
/* Get the current MDF1 source */
srcclk = __HAL_RCC_GET_MDF1_SOURCE();
switch (srcclk)
{
case RCC_MDF1CLKSOURCE_PLL1:
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_P_Frequency;
break;
case RCC_MDF1CLKSOURCE_PLL3:
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
frequency = pll3_clocks.PLL3_Q_Frequency;
break;
case RCC_MDF1CLKSOURCE_HCLK:
frequency = HAL_RCC_GetHCLKFreq();
break;
case RCC_MDF1CLKSOURCE_PIN:
frequency = EXTERNAL_SAI1_CLOCK_VALUE;
break;
case RCC_MDF1CLKSOURCE_MSIK:
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
default:
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_ADF1:
/* Get the current ADF1 source */
srcclk = __HAL_RCC_GET_ADF1_SOURCE();
switch (srcclk)
{
case RCC_ADF1CLKSOURCE_PLL1:
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_P_Frequency;
break;
case RCC_ADF1CLKSOURCE_PLL3:
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
frequency = pll3_clocks.PLL3_Q_Frequency;
break;
case RCC_ADF1CLKSOURCE_HCLK:
frequency = HAL_RCC_GetHCLKFreq();
break;
case RCC_ADF1CLKSOURCE_PIN:
frequency = EXTERNAL_SAI1_CLOCK_VALUE;
break;
case RCC_ADF1CLKSOURCE_MSIK:
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
default:
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_I2C1:
/* Get the current I2C1 source */
srcclk = __HAL_RCC_GET_I2C1_SOURCE();
if (srcclk == RCC_I2C1CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2C1CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
/* Clock not enabled for I2C1 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_I2C2:
/* Get the current I2C2 source */
srcclk = __HAL_RCC_GET_I2C2_SOURCE();
if (srcclk == RCC_I2C2CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if (srcclk == RCC_I2C2CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2C2CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
/* Clock not enabled for I2C2 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_I2C3:
/* Get the current I2C3 source */
srcclk = __HAL_RCC_GET_I2C3_SOURCE();
switch (srcclk)
{
case RCC_I2C3CLKSOURCE_PCLK3:
{
frequency = HAL_RCC_GetPCLK3Freq();
break;
}
case RCC_I2C3CLKSOURCE_HSI:
{
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
{
frequency = HSI_VALUE;
}
else
{
frequency = 0U;
}
break;
}
case RCC_I2C3CLKSOURCE_SYSCLK:
{
frequency = HAL_RCC_GetSysClockFreq();
break;
}
case RCC_I2C3CLKSOURCE_MSIK:
{
frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> RCC_ICSCR1_MSISRANGE_Pos)];
break;
}
default:
{
frequency = 0U;
break;
}
}
break;
case RCC_PERIPHCLK_I2C4:
/* Get the current I2C4 source */
srcclk = __HAL_RCC_GET_I2C4_SOURCE();
if (srcclk == RCC_I2C4CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if (srcclk == RCC_I2C4CLKSOURCE_SYSCLK)
{
frequency = HAL_RCC_GetSysClockFreq();
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_I2C4CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
/* Clock not enabled for I2C4 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_LPTIM34:
/* Get the current LPTIM34 source */
srcclk = __HAL_RCC_GET_LPTIM34_SOURCE();
if (srcclk == RCC_LPTIM34CLKSOURCE_MSIK)
{
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSIRDY)) && (srcclk == RCC_LPTIM34CLKSOURCE_LSI))
{
frequency = LSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_LPTIM34CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_LPTIM34CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for LPTIM34 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_LPTIM1:
/* Get the current LPTIM1 source */
srcclk = __HAL_RCC_GET_LPTIM1_SOURCE();
if (srcclk == RCC_LPTIM1CLKSOURCE_MSIK)
{
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSIRDY)) && (srcclk == RCC_LPTIM1CLKSOURCE_LSI))
{
frequency = LSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_LPTIM1CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_LPTIM1CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for LPTIM1 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_LPTIM2:
/* Get the current LPTIM2 source */
srcclk = __HAL_RCC_GET_LPTIM2_SOURCE();
if (srcclk == RCC_LPTIM2CLKSOURCE_PCLK1)
{
frequency = HAL_RCC_GetPCLK1Freq();
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSIRDY)) && (srcclk == RCC_LPTIM2CLKSOURCE_LSI))
{
frequency = LSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (srcclk == RCC_LPTIM2CLKSOURCE_HSI))
{
frequency = HSI_VALUE;
}
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_LPTIM2CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Clock not enabled for LPTIM2 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_FDCAN1:
/* Get the current FDCAN1 kernel source */
srcclk = __HAL_RCC_GET_FDCAN1_SOURCE();
if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (srcclk == RCC_FDCAN1CLKSOURCE_HSE))
{
frequency = HSE_VALUE;
}
else if (srcclk == RCC_FDCAN1CLKSOURCE_PLL1) /* PLL1 ? */
{
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_Q_Frequency;
}
else if (srcclk == RCC_FDCAN1CLKSOURCE_PLL2) /* PLL2 ? */
{
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
frequency = pll2_clocks.PLL2_P_Frequency;
}
/* Clock not enabled for FDCAN1 */
else
{
frequency = 0U;
}
break;
case RCC_PERIPHCLK_SPI1:
/* Get the current SPI1 kernel source */
srcclk = __HAL_RCC_GET_SPI1_SOURCE();
switch (srcclk)
{
case RCC_SPI1CLKSOURCE_PCLK2:
frequency = HAL_RCC_GetPCLK2Freq();
break;
case RCC_SPI1CLKSOURCE_SYSCLK:
frequency = HAL_RCC_GetSysClockFreq();
break;
case RCC_SPI1CLKSOURCE_HSI:
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
{
frequency = HSI_VALUE;
}
else
{
frequency = 0U;
}
break;
case RCC_SPI1CLKSOURCE_MSIK:
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
default:
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_SPI2:
/* Get the current SPI2 kernel source */
srcclk = __HAL_RCC_GET_SPI2_SOURCE();
switch (srcclk)
{
case RCC_SPI2CLKSOURCE_PCLK1:
frequency = HAL_RCC_GetPCLK1Freq();
break;
case RCC_SPI2CLKSOURCE_SYSCLK:
frequency = HAL_RCC_GetSysClockFreq();
break;
case RCC_SPI2CLKSOURCE_HSI:
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
{
frequency = HSI_VALUE;
}
else
{
frequency = 0U;
}
break;
case RCC_SPI2CLKSOURCE_MSIK:
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
default:
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_SPI3:
/* Get the current SPI3 kernel source */
srcclk = __HAL_RCC_GET_SPI3_SOURCE();
switch (srcclk)
{
case RCC_SPI3CLKSOURCE_PCLK3:
frequency = HAL_RCC_GetPCLK3Freq();
break;
case RCC_SPI3CLKSOURCE_SYSCLK:
frequency = HAL_RCC_GetSysClockFreq();
break;
case RCC_SPI3CLKSOURCE_HSI:
if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))
{
frequency = HSI_VALUE;
}
else
{
frequency = 0U;
}
break;
case RCC_SPI3CLKSOURCE_MSIK:
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
default:
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_OSPI:
/* Get the current OSPI kernel source */
srcclk = __HAL_RCC_GET_OSPI_SOURCE();
switch (srcclk)
{
case RCC_OSPICLKSOURCE_PLL2:
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
frequency = pll2_clocks.PLL2_Q_Frequency;
break;
case RCC_OSPICLKSOURCE_PLL1:
HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
frequency = pll1_clocks.PLL1_Q_Frequency;
break;
case RCC_OSPICLKSOURCE_SYSCLK:
frequency = HAL_RCC_GetSysClockFreq();
break;
case RCC_OSPICLKSOURCE_MSIK:
frequency = MSIRangeTable[(__HAL_RCC_GET_MSIK_RANGE() >> RCC_ICSCR1_MSIKRANGE_Pos)];
break;
default:
frequency = 0U;
break;
}
break;
case RCC_PERIPHCLK_DAC1:
/* Get the current DAC1 kernel source */
srcclk = __HAL_RCC_GET_DAC1_SOURCE();
/* Check if LSE is ready and if DAC1 clock selection is LSE */
if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) && (srcclk == RCC_DAC1CLKSOURCE_LSE))
{
frequency = LSE_VALUE;
}
/* Check if LSI is ready and if DAC1 clock selection is LSI */
else if ((HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSIRDY)) && (srcclk == RCC_DAC1CLKSOURCE_LSI))
{
frequency = LSI_VALUE;
}
/* Clock not enabled for DAC1*/
else
{
frequency = 0U;
}
break;
default:
frequency = 0U;
break;
}
}
return (frequency);
}