in arch/arm/src/at32/at32_tim.c [931:1388]
static int at32_tim_setchannel(struct at32_tim_dev_s *dev,
uint8_t channel, at32_tim_channel_t mode)
{
uint16_t ccmr_orig = 0;
uint16_t ccmr_val = 0;
uint16_t ccmr_mask = 0xff;
uint16_t ccer_val = at32_getreg16(dev, AT32_GTIM_CCER_OFFSET);
uint8_t ccmr_offset = AT32_GTIM_CCMR1_OFFSET;
DEBUGASSERT(dev != NULL);
/* Further we use range as 0..3; if channel=0 it will also overflow here */
if (--channel > 4)
{
return -EINVAL;
}
/* Assume that channel is disabled and polarity is active high */
ccer_val &= ~((GTIM_CCER_CC1P | GTIM_CCER_CC1E) <<
GTIM_CCER_CCXBASE(channel));
/* This function is not supported on basic timers. To enable or
* disable it, simply set its clock to valid frequency or zero.
*/
#if AT32_NBTIM > 0
if (((struct at32_tim_priv_s *)dev)->base == AT32_TMR6_BASE
#endif
#if AT32_NBTIM > 1
|| ((struct at32_tim_priv_s *)dev)->base == AT32_TMR7_BASE
#endif
#if AT32_NBTIM > 0
)
{
return -EINVAL;
}
#endif
/* Decode configuration */
switch (mode & AT32_TIM_CH_MODE_MASK)
{
case AT32_TIM_CH_DISABLED:
break;
case AT32_TIM_CH_OUTPWM:
ccmr_val = (GTIM_CCMR_MODE_PWM1 << GTIM_CCMR1_OC1M_SHIFT) +
GTIM_CCMR1_OC1PE;
ccer_val |= GTIM_CCER_CC1E << GTIM_CCER_CCXBASE(channel);
break;
default:
return -EINVAL;
}
/* Set polarity */
if (mode & AT32_TIM_CH_POLARITY_NEG)
{
ccer_val |= GTIM_CCER_CC1P << GTIM_CCER_CCXBASE(channel);
}
/* Define its position (shift) and get register offset */
if (channel & 1)
{
ccmr_val <<= 8;
ccmr_mask <<= 8;
}
if (channel > 1)
{
ccmr_offset = AT32_GTIM_CCMR2_OFFSET;
}
ccmr_orig = at32_getreg16(dev, ccmr_offset);
ccmr_orig &= ~ccmr_mask;
ccmr_orig |= ccmr_val;
at32_putreg16(dev, ccmr_offset, ccmr_orig);
at32_putreg16(dev, AT32_GTIM_CCER_OFFSET, ccer_val);
/* set GPIO */
switch (((struct at32_tim_priv_s *)dev)->base)
{
#ifdef CONFIG_AT32_TIM1
case AT32_TMR1_BASE:
switch (channel)
{
#if defined(GPIO_TIM1_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break;
#endif
#if defined(GPIO_TIM1_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break;
#endif
#if defined(GPIO_TIM1_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break;
#endif
#if defined(GPIO_TIM1_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM2
case AT32_TMR2_BASE:
switch (channel)
{
#if defined(GPIO_TIM2_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM2_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM2_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM2_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM2_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM2_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM2_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM3
case AT32_TMR3_BASE:
switch (channel)
{
#if defined(GPIO_TIM3_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM3_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM3_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM3_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM3_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM3_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM3_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM3_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM4
case AT32_TMR4_BASE:
switch (channel)
{
#if defined(GPIO_TIM4_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM4_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM4_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM4_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM4_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM4_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM4_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM5
case AT32_TMR5_BASE:
switch (channel)
{
#if defined(GPIO_TIM5_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM5_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM5_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM5_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM5_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM5_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM5_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM8
case AT32_TMR8_BASE:
switch (channel)
{
#if defined(GPIO_TIM8_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break;
#endif
#if defined(GPIO_TIM8_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM8_CH2OUT, mode); break;
#endif
#if defined(GPIO_TIM8_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM8_CH3OUT, mode); break;
#endif
#if defined(GPIO_TIM8_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM9
case AT32_TMR9_BASE:
switch (channel)
{
#if defined(GPIO_TIM9_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM9_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM9_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM9_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM9_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM9_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM9_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM9_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM10
case AT32_TMR10_BASE:
switch (channel)
{
#if defined(GPIO_TIM10_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM10_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM10_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM10_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM10_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM10_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM10_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM10_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM11
case AT32_TMR11_BASE:
switch (channel)
{
#if defined(GPIO_TIM11_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM11_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM11_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM11_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM11_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM11_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM11_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM11_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM12
case AT32_TMR12_BASE:
switch (channel)
{
#if defined(GPIO_TIM12_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM12_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM12_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM12_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM12_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM12_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM12_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM12_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM13
case AT32_TMR13_BASE:
switch (channel)
{
#if defined(GPIO_TIM13_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM13_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM13_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM13_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM13_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM13_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM13_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM13_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM14
case AT32_TMR14_BASE:
switch (channel)
{
#if defined(GPIO_TIM14_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM14_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM14_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM14_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM14_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM14_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM14_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM14_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif
#ifdef CONFIG_AT32_TIM20
case AT32_TMR20_BASE:
switch (channel)
{
#if defined(GPIO_TIM20_CH1OUT)
case 0:
at32_tim_gpioconfig(GPIO_TIM20_CH1OUT, mode); break;
#endif
#if defined(GPIO_TIM20_CH2OUT)
case 1:
at32_tim_gpioconfig(GPIO_TIM20_CH2OUT, mode); break;
#endif
#if defined(GPIO_TIM20_CH3OUT)
case 2:
at32_tim_gpioconfig(GPIO_TIM20_CH3OUT, mode); break;
#endif
#if defined(GPIO_TIM20_CH4OUT)
case 3:
at32_tim_gpioconfig(GPIO_TIM20_CH4OUT, mode); break;
#endif
default:
return -EINVAL;
}
break;
#endif
default:
return -EINVAL;
}
return OK;
}