in vm/jitrino/src/optimizer/simplifytaus.cpp [990:1154]
void TauWalkerState::reduceVarTaus(Inst *inst)
{
Opcode opcode = inst->getOpcode();
switch (opcode) {
case Op_LdVar:
{
}
break;
case Op_StVar:
{
Opnd *opnd = inst->getDst();
for (U_32 exactTypeCount = 0; exactTypeCount < 2; ++exactTypeCount) {
bool exactType = (exactTypeCount != 0);
StlVectorSet<Type *> *reduceTypes = shouldReduceSsaOpnd(opnd, exactType);
if (reduceTypes) {
if (Log::isEnabled()) {
Log::out() << "reducing StVar inst ";
inst->print(Log::out());
Log::out() << ::std::endl;
}
StlVectorSet<Type *>::iterator
iter = reduceTypes->begin(),
end = reduceTypes->end();
for ( ; iter != end; ++iter) {
Type *type = *iter;
VarOpnd *baseTauOpnd = getReductionTauBaseVar(opnd, type, exactType);
if (Log::isEnabled()) {
Log::out() << "reducing StVar inst ";
inst->print(Log::out());
if (exactType)
Log::out() << " for exact type ";
else
Log::out() << " for type ";
if (type)
type->print(Log::out());
else
Log::out() << "NONNULL";
Log::out() << ::std::endl;
}
Opnd *newDst = reduceSsaOpnd(inst->getDst(), baseTauOpnd, type, exactType);
SsaVarOpnd *newDstSsaVarOpnd = newDst->asSsaVarOpnd();
if (newDstSsaVarOpnd) {
if (!newDstSsaVarOpnd->getInst()) {
Opnd *newSrc = findReplacement(inst->getSrc(0), type, exactType);
Inst *newInst = irManager.getInstFactory().makeStVar(newDstSsaVarOpnd,
newSrc);
assert(newInst->getDst()->getInst() == newInst);
assert(newDstSsaVarOpnd->getInst()->getDst() == newDstSsaVarOpnd);
newInst->insertAfter(inst);
if (Log::isEnabled()) {
Log::out() << "reduced StVar inst ";
inst->print(Log::out());
Log::out() << " to inst ";
newInst->print(Log::out());
Log::out() << ::std::endl;
}
} else {
if (Log::isEnabled()) {
Log::out() << "tau opnd ";
newDstSsaVarOpnd->print(Log::out());
Log::out() << " already has an inst ";
newDstSsaVarOpnd->getInst()->print(Log::out());
Log::out() << ::std::endl;
}
}
} else {
VarOpnd *newDstVarOpnd = newDst->asVarOpnd();
assert(newDstVarOpnd);
Opnd *newSrc = findReplacement(inst->getSrc(0), type, exactType);
Inst *newInst = irManager.getInstFactory().makeStVar(newDstVarOpnd,
newSrc);
newInst->insertAfter(inst);
if (Log::isEnabled()) {
Log::out() << "reduced StVar inst ";
inst->print(Log::out());
Log::out() << " to inst ";
newInst->print(Log::out());
Log::out() << ::std::endl;
}
}
}
}
}
}
break;
case Op_Phi:
{
Opnd *opnd = inst->getDst();
for (U_32 exactTypeCount = 0; exactTypeCount < 2; ++exactTypeCount) {
bool exactType = (exactTypeCount != 0);
StlVectorSet<Type *> *reduceTypes = shouldReduceSsaOpnd(opnd, exactType);
if (reduceTypes) {
if (Log::isEnabled()) {
Log::out() << "reducing Phi inst ";
inst->print(Log::out());
Log::out() << ::std::endl;
}
StlVectorSet<Type *>::iterator
iter = reduceTypes->begin(),
end = reduceTypes->end();
for ( ; iter != end; ++iter) {
Type *type = *iter;
VarOpnd *baseTauOpnd = getReductionTauBaseVar(opnd, type, exactType);
if (Log::isEnabled()) {
Log::out() << "reducing Phi inst ";
inst->print(Log::out());
if (exactType)
Log::out() << " for exact type ";
else
Log::out() << " for type ";
if (type)
type->print(Log::out());
else
Log::out() << "NONNULL";
Log::out() << ::std::endl;
}
Opnd *newDst = reduceSsaOpnd(inst->getDst(), baseTauOpnd, type, exactType);
if (!newDst->getInst()){
U_32 numOpnds = inst->getNumSrcOperands();
Opnd** newOpnds = new (mm) Opnd*[numOpnds];
for (U_32 i=0; i<numOpnds; ++i) {
Opnd *oldOpnd = inst->getSrc(i);
Opnd *newOpnd = reduceSsaOpnd(oldOpnd, baseTauOpnd, type, exactType);
newOpnds[i] = newOpnd;
}
Inst *newInst = irManager.getInstFactory().makePhi(newDst, numOpnds, newOpnds);
newInst->insertAfter(inst);
if (Log::isEnabled()) {
Log::out() << "reduced Phi inst ";
inst->print(Log::out());
Log::out() << " to inst ";
newInst->print(Log::out());
Log::out() << ::std::endl;
}
} else {
if (Log::isEnabled()) {
Log::out() << "tau opnd ";
newDst->print(Log::out());
Log::out() << " already has an inst ";
newDst->getInst()->print(Log::out());
Log::out() << ::std::endl;
}
}
}
}
}
}
break;
default:
break;
}
}