in hardware/xilinx/src/vta.cc [47:73]
void load_pad_2d(
volatile DATA_T *src,
DATA_T dst[][MAT_AXI_RATIO],
memop_sram_T sram_idx,
memop_dram_T dram_idx,
memop_size_T y_size,
memop_size_T x_size,
memop_stride_T x_stride,
memop_pad_T x_pad_0,
memop_pad_T x_pad_1,
memop_sram_T y_offset_0,
memop_sram_T y_offset_1) {
#pragma HLS INLINE
reset_mem<DATA_T, MAT_AXI_RATIO>(sram_idx, y_offset_0, dst);
for (int y = 0; y < y_size; y++) {
#pragma HLS PIPELINE
reset_mem<DATA_T, MAT_AXI_RATIO>(sram_idx, x_pad_0, dst);
memcpy(&dst[sram_idx][0],
(const DATA_T*) &src[dram_idx * MAT_AXI_RATIO],
x_size * ELEM_BYTES);
sram_idx += x_size;
dram_idx += x_stride;
reset_mem<DATA_T, MAT_AXI_RATIO>(sram_idx, x_pad_1, dst);
}
reset_mem<DATA_T, MAT_AXI_RATIO>(sram_idx, y_offset_1, dst);
}