in platform/broadcom/sonic-platform-modules-delta/agc032/modules/delta_agc032_cpupld.c [130:361]
static ssize_t cpupld_data_show(struct device *dev, struct device_attribute *dev_attr, char *buf)
{
struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr);
struct platform_data *pdata = dev->platform_data;
unsigned int select = 0;
unsigned char offset = 0;
int mask = 0xFF;
int shift = 0;
int value = 0;
bool hex_fmt = 0;
char desc[256] = {0};
select = attr->index;
switch(select) {
case CPU_PCB_NUM:
offset = 0x0;
hex_fmt = 1;
scnprintf(desc, PAGE_SIZE, "\nCPU Borad PCB Number.\n");
break;
case CPUPLD_VER_TYPE:
offset = 0x1;
shift = 7;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\nCPUPLD Version Type.\n");
break;
case CPUPLD_VER:
offset = 0x1;
mask = 0x7F;
scnprintf(desc, PAGE_SIZE, "\nCPUPLD Version.\n");
break;
case BDXDE_PLAT_RST:
offset = 0x9;
shift = 4;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Platform Reset State\n“0” = Platform Not Reset State.\n");
break;
case BDXDE_SLP3_STAT:
offset = 0x9;
shift = 3;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = CPU at S3 State\n“0” = CPU Not at S3 State.\n");
break;
case BDXDE_SLP4_STAT:
offset = 0x9;
shift = 2;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = CPU at S4Sstate\n“0” = CPU Not at S4 State.\n");
break;
case BDXDE_CPU_RST:
offset = 0x9;
shift = 1;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = CPU Not Reset State\n“0” = CPU Reset State.\n");
break;
case CPLD_DEBUG_MODE:
offset = 0x9;
shift = 0;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\nCPLD Power Sequence\n“1” = Debug Mode\n“0” = Normal Mode.\n");
break;
case APWROK_STAT:
offset = 0xA;
shift = 1;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = APWROK Stable\n“0” = APWROK Unstable.\n");
break;
case EDGE_PROCHOT_SIG_DIS:
offset = 0xB;
shift = 5;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable Power Supply Thermal Signal\n“0” = Enable Power Supply Thermal Signal.\n");
break;
case PSU_THERMAL_STAT:
offset = 0xB;
shift = 4;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Power Supply Normal Temperature\n“0” = Power Supply Over Temperature.\n");
break;
case PR_THERMAL_STAT:
offset = 0xB;
shift = 3;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Power Rail Normal Temperature\n“0” = Power Rail Over Temperature.\n");
break;
case ME_DRIVE_SIG_EN:
offset = 0xB;
shift = 2;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable System Thermal Alarm to CPU\n“0” = System Thermal Alarm to CPU.\n");
break;
case CPU_THERMAL_STAT:
offset = 0xB;
shift = 1;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = CPU Disomic Normal Temperature\n“0” = CPU Disomic Over Temperatur.\n");
break;
case DDR_THERMAL_STAT:
offset = 0xB;
shift = 0;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = DDR Normal Temperature\n“0” = DDR Over Temperature.\n");
break;
case SYS_THERMAL_STAT:
offset = 0xC;
shift = 0;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = System Normal Temperature.\n“0” = System Over Temperature.\n");
break;
case DEBUG_LED3_EN:
offset = 0xD;
shift = 3;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable Debug LED3\n“0” = Enable Debug LED3.\n");
break;
case DEBUG_LED2_EN:
offset = 0xD;
shift = 2;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable Debug LED2\n“0” = Enable Debug LED2.\n");
break;
case DEBUG_LED1_EN:
offset = 0xD;
shift = 1;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable Debug LED1\n“0” = Enable Debug LED1.\n");
break;
case DEBUG_LED0_EN:
offset = 0xD;
shift = 0;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable Debug LED0\n“0” = Enable Debug LED0.\n");
break;
case CPU_STANDBY_MODE:
offset = 0x11;
shift = 3;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = CPU Power Stanby Not Ready\n“0” = CPU Power Stanby Ready.\n");
break;
case CPLD_RST:
offset = 0x11;
shift = 0;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Normal Operation\n“0” = CPLD Reset.\n");
break;
case MB_POWER_STAT:
offset = 0x12;
shift = 2;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Power Rail Good\n“0” = Power Rail Failed.\n");
break;
case BIOS2_SPI_WP:
offset = 0x13;
shift = 3;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable BIOS2 SPI Write Protect\n“0” = Enable BIOS2 SPI Write Protect.\n");
break;
case BIOS1_SPI_WP:
offset = 0x13;
shift = 2;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable BIOS1 SPI Write Protect\n“0” = Enable BIOS1 SPI Write Protect.\n");
break;
case BIOS_MUX_SEL:
offset = 0x13;
shift = 1;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Primary BIOS\n“0” = Backup BIOS.\n");
break;
case GBE_SPI_WP:
offset = 0x13;
shift = 0;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable GBE SPI Write Protect\n“0” = Enable GBE SPI Write Protect.\n");
break;
case PCH_THERMTRIP_EN:
offset = 0x14;
shift = 4;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Thermal Trip Not Occured\n“0” = Thermal Trip Occured.\n");
break;
case ID_EEPROM_EN:
offset = 0x14;
shift = 3;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable ID EEPROM Write Protect\n“0” = Enable ID EEPROM Write Protect.\n");
break;
case CPU_I2C_MUX_EN:
offset = 0x14;
shift = 2;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Enable CPU I2C Mux\n“0” = Disable CPU I2C Mux.\n");
break;
case CPU_I2C_MUX_SEL:
offset = 0x14;
shift = 0;
mask = 0x3;
scnprintf(desc, PAGE_SIZE, "\n“3” = Select MB Panel Port.\n“2” = Select MB SWPLD.\n“1” = Select MB Mux.\n“0” = Select ONIE EEPROM.\n");
break;
case PSU_FAN_INTR:
offset = 0x15;
shift = 1;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = PSU Fan Interrupt Occured\n“0” = PSU Fan Interrupt Not Occured.\n");
break;
case WD_TIMER:
offset = 0x1E;
shift = 3;
mask = 0x38;
scnprintf(desc, PAGE_SIZE, "\n“5” = Timer 60 sec.\n“4” = Timer 50 sec.\n“3” = Timer 40 sec.\n“2” = Timer 30 sec.\n“1” = Timer 20 sec.\n“0” = Timer 15 sec.\n");
break;
case WD_EN:
offset = 0x1E;
shift = 2;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Disable Watchdog Function\n“0” = Enable Watchdog Function.\n");
break;
case WD_CLEAR_FLAG:
offset = 0x1E;
shift = 0;
mask = (1 << shift);
scnprintf(desc, PAGE_SIZE, "\n“1” = Watchdog Timer Flag Clear\n“0” = Watchdog Timer Flag Not Clear.\n");
break;
}
value = i2c_smbus_read_byte_data(pdata[cpld].client, offset);
value = (value & mask) >> shift;
if(hex_fmt) {
return scnprintf(buf, PAGE_SIZE, "0x%02x%s", value, desc);
} else {
return scnprintf(buf, PAGE_SIZE, "%d%s", value, desc);
}
}