static int register_intr_handler()

in platform/broadcom/sonic-platform-modules-dell/s5224f/modules/dell_s5224f_fpga_ocores.c [1094:1296]


static int register_intr_handler(struct pci_dev *dev, int irq_num_id)
{
	int err = 0;
	struct fpgapci_dev *fpgapci = 0;

	fpgapci = (struct fpgapci_dev*) dev_get_drvdata(&dev->dev);
	if (fpgapci == 0) {
		PRINT ( ": fpgapci_dev is 0\n");
		return err;
	}

    if ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_00) {
	    /* Request interrupt line for unique function
	     * alternatively function will be called from free_irq as well
         * with flag IRQF_SHARED */
	    switch(irq_num_id) {
		/* Currently we only support test vector 2 for FPGA Logic I2C channel
         * controller 1-7  interrupt*/
		    case FPGA_MSI_VECTOR_ID_4:
			    err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME,
					    FPGA_PCI_NAME, dev);
			    PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id);
			    fpgapci->irq_assigned++;
			    break;
		    case FPGA_MSI_VECTOR_ID_5:
			    err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME,
					    FPGA_PCI_NAME, dev);
			    PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id);
			    fpgapci->irq_assigned++;
			    break;
                    case FPGA_MSI_VECTOR_ID_8:
			    err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
                    FPGA_PCI_NAME, &fpgalogic_i2c[0]);
			    fpgapci->irq_assigned++;
			    break;
		    case FPGA_MSI_VECTOR_ID_9:
                            err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
                    FPGA_PCI_NAME, &fpgalogic_i2c[1]);
			    fpgapci->irq_assigned++;
			    break;
		    case FPGA_MSI_VECTOR_ID_10:
			    err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
                    FPGA_PCI_NAME, &fpgalogic_i2c[2]);
			    fpgapci->irq_assigned++;
			    break;
		    case FPGA_MSI_VECTOR_ID_11:
			    err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
                    FPGA_PCI_NAME, &fpgalogic_i2c[3]);
			    fpgapci->irq_assigned++;
			    break;
		    case FPGA_MSI_VECTOR_ID_12:
			    err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
                    FPGA_PCI_NAME, &fpgalogic_i2c[4]);
			    fpgapci->irq_assigned++;
			    break;
		    case FPGA_MSI_VECTOR_ID_13:
			    err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
                    FPGA_PCI_NAME, &fpgalogic_i2c[5]);
			    fpgapci->irq_assigned++;
			    break;
		    case FPGA_MSI_VECTOR_ID_14:
			    err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
                    FPGA_PCI_NAME, &fpgalogic_i2c[6]);
			    fpgapci->irq_assigned++;
			    break;

		    default:
			    PRINT("No more interrupt handler for number (%d)\n",
                    dev->irq + irq_num_id);
			    break;
	    }
    } else if (((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_01) ||
        ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_02) ||
        ((board_rev_type & MB_BRD_REV_MASK) == MB_BRD_REV_03)) {
            /* FPGA SPEC 4.3.1.34, First i2c channel mapped to vector 8 */
        switch (irq_num_id) {
		case FPGA_MSI_VECTOR_ID_4:
			err = request_irq(dev->irq + irq_num_id, fpgaport_1_32_isr, IRQF_EARLY_RESUME,
					FPGA_PCI_NAME, dev);
			PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id);
			fpgapci->irq_assigned++;
			break;
		case FPGA_MSI_VECTOR_ID_5:
			err = request_irq(dev->irq + irq_num_id, fpgaport_33_64_isr, IRQF_EARLY_RESUME,
					FPGA_PCI_NAME, dev);
			PRINT ( "%d: fpgapci_dev: irq: %d, %d\n", __LINE__, dev->irq, irq_num_id);
			fpgapci->irq_assigned++;
			break;
		case FPGA_MSI_VECTOR_ID_8:
			err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
					FPGA_PCI_NAME, &fpgalogic_i2c[0]);
			fpgapci->irq_assigned++;
			break;
		case FPGA_MSI_VECTOR_ID_9:
			err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
					FPGA_PCI_NAME, &fpgalogic_i2c[1]);
			fpgapci->irq_assigned++;
			break;
		case FPGA_MSI_VECTOR_ID_10:
			err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
					FPGA_PCI_NAME, &fpgalogic_i2c[2]);
			fpgapci->irq_assigned++;
			break;
		case FPGA_MSI_VECTOR_ID_11:
			err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
					FPGA_PCI_NAME, &fpgalogic_i2c[3]);
			fpgapci->irq_assigned++;
			break;
		case FPGA_MSI_VECTOR_ID_12:
			err = request_irq(dev->irq + irq_num_id, fpgai2c_isr, IRQF_EARLY_RESUME,
					FPGA_PCI_NAME, &fpgalogic_i2c[4]);
			fpgapci->irq_assigned++;
			break;
		case FPGA_MSI_VECTOR_ID_13:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[5]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_14:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_5) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[6]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_15:
			/*it is an external interrupt number. Ignore this case */
			break;
		case FPGA_MSI_VECTOR_ID_16:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_7) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[7]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_17:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[8]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_18:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_8) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[9]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_19:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[10]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_20:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_10) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[11]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_21:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[12]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_22:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[13]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_23:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[14]);
				fpgapci->irq_assigned++;
			}
			break;
		case FPGA_MSI_VECTOR_ID_24:
			if (total_i2c_pci_bus > I2C_PCI_BUS_NUM_12) {
				err = request_irq(dev->irq + irq_num_id, fpgai2c_isr,
						IRQF_EARLY_RESUME, FPGA_PCI_NAME, &fpgalogic_i2c[15]);
				fpgapci->irq_assigned++;
			}
			break;

		default:
			PRINT("No more interrupt handler for number (%d)\n",
					dev->irq + irq_num_id);
			break;
        }
    }

	return err;
}