static inline void asid_check_context()

in include/asm/asid.h [42:72]

• 14 lines of code
• 4 McCabe index (conditional complexity)

static inline void asid_check_context(struct asid_info *info,
				      atomic64_t *pasid, unsigned int cpu,
				      struct mm_struct *mm)
{
	u64 asid, old_active_asid;

	asid = atomic64_read(pasid);

	/*
	 * The memory ordering here is subtle.
	 * If our active_asid is non-zero and the ASID matches the current
	 * generation, then we update the active_asid entry with a relaxed
	 * cmpxchg. Racing with a concurrent rollover means that either:
	 *
	 * - We get a zero back from the cmpxchg and end up waiting on the
	 *   lock. Taking the lock synchronises with the rollover and so
	 *   we are forced to see the updated generation.
	 *
	 * - We get a valid ASID back from the cmpxchg, which means the
	 *   relaxed xchg in flush_context will treat us as reserved
	 *   because atomic RmWs are totally ordered for a given location.
	 */
	old_active_asid = atomic64_read(&active_asid(info, cpu));
	if (old_active_asid &&
	    !((asid ^ atomic64_read(&info->generation)) >> info->bits) &&
	    atomic64_cmpxchg_relaxed(&active_asid(info, cpu),
				     old_active_asid, asid))
		return;

	asid_new_context(info, pasid, cpu, mm);
}