in kernel/setup.c [90:149]
static void __init dump_cpu_info(int cpu)
{
int i, p = 0;
char str[sizeof(hwcap_str) + 16];
for (i = 0; hwcap_str[i]; i++) {
if (elf_hwcap & (1 << i)) {
sprintf(str + p, "%s ", hwcap_str[i]);
p += strlen(hwcap_str[i]) + 1;
}
}
pr_info("CPU%d Features: %s\n", cpu, str);
L1_cache_info[ICACHE].ways = CACHE_WAY(ICACHE);
L1_cache_info[ICACHE].line_size = CACHE_LINE_SIZE(ICACHE);
L1_cache_info[ICACHE].sets = CACHE_SET(ICACHE);
L1_cache_info[ICACHE].size =
L1_cache_info[ICACHE].ways * L1_cache_info[ICACHE].line_size *
L1_cache_info[ICACHE].sets / 1024;
pr_info("L1I:%dKB/%dS/%dW/%dB\n", L1_cache_info[ICACHE].size,
L1_cache_info[ICACHE].sets, L1_cache_info[ICACHE].ways,
L1_cache_info[ICACHE].line_size);
L1_cache_info[DCACHE].ways = CACHE_WAY(DCACHE);
L1_cache_info[DCACHE].line_size = CACHE_LINE_SIZE(DCACHE);
L1_cache_info[DCACHE].sets = CACHE_SET(DCACHE);
L1_cache_info[DCACHE].size =
L1_cache_info[DCACHE].ways * L1_cache_info[DCACHE].line_size *
L1_cache_info[DCACHE].sets / 1024;
pr_info("L1D:%dKB/%dS/%dW/%dB\n", L1_cache_info[DCACHE].size,
L1_cache_info[DCACHE].sets, L1_cache_info[DCACHE].ways,
L1_cache_info[DCACHE].line_size);
pr_info("L1 D-Cache is %s\n", WRITE_METHOD);
if (L1_cache_info[DCACHE].size != L1_CACHE_BYTES)
pr_crit
("The cache line size(%d) of this processor is not the same as L1_CACHE_BYTES(%d).\n",
L1_cache_info[DCACHE].size, L1_CACHE_BYTES);
#ifdef CONFIG_CPU_CACHE_ALIASING
{
int aliasing_num;
aliasing_num =
L1_cache_info[ICACHE].size * 1024 / PAGE_SIZE /
L1_cache_info[ICACHE].ways;
L1_cache_info[ICACHE].aliasing_num = aliasing_num;
L1_cache_info[ICACHE].aliasing_mask =
(aliasing_num - 1) << PAGE_SHIFT;
aliasing_num =
L1_cache_info[DCACHE].size * 1024 / PAGE_SIZE /
L1_cache_info[DCACHE].ways;
L1_cache_info[DCACHE].aliasing_num = aliasing_num;
L1_cache_info[DCACHE].aliasing_mask =
(aliasing_num - 1) << PAGE_SHIFT;
}
#endif
#ifdef CONFIG_FPU
/* Disable fpu and enable when it is used. */
if (has_fpu)
disable_fpu();
#endif
}