static void __init setup_cpuinfo()

in kernel/setup.c [151:240]

• 68 lines of code
• 23 McCabe index (conditional complexity)

static void __init setup_cpuinfo(void)
{
	unsigned long tmp = 0, cpu_name;

	cpu_dcache_inval_all();
	cpu_icache_inval_all();
	__nds32__isb();

	cpu_id = (__nds32__mfsr(NDS32_SR_CPU_VER) & CPU_VER_mskCPUID) >> CPU_VER_offCPUID;
	cpu_name = ((cpu_id) & 0xf0) >> 4;
	cpu_series = cpu_name ? cpu_name - 10 + 'A' : 'N';
	cpu_id = cpu_id & 0xf;
	cpu_rev = (__nds32__mfsr(NDS32_SR_CPU_VER) & CPU_VER_mskREV) >> CPU_VER_offREV;
	cpu_cfgid = (__nds32__mfsr(NDS32_SR_CPU_VER) & CPU_VER_mskCFGID) >> CPU_VER_offCFGID;

	pr_info("CPU:%c%ld, CPU_VER 0x%08x(id %lu, rev %lu, cfg %lu)\n",
		cpu_series, cpu_id, __nds32__mfsr(NDS32_SR_CPU_VER), cpu_id, cpu_rev, cpu_cfgid);

	elf_hwcap |= HWCAP_MFUSR_PC;

	if (((__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskBASEV) >> MSC_CFG_offBASEV) == 0) {
		if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskDIV)
			elf_hwcap |= HWCAP_DIV;

		if ((__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskMAC)
		    || (cpu_id == 12 && cpu_rev < 4))
			elf_hwcap |= HWCAP_MAC;
	} else {
		elf_hwcap |= HWCAP_V2;
		elf_hwcap |= HWCAP_DIV;
		elf_hwcap |= HWCAP_MAC;
	}

	if (cpu_cfgid & 0x0001)
		elf_hwcap |= HWCAP_EXT;

	if (cpu_cfgid & 0x0002)
		elf_hwcap |= HWCAP_BASE16;

	if (cpu_cfgid & 0x0004)
		elf_hwcap |= HWCAP_EXT2;

	if (cpu_cfgid & 0x0008) {
		elf_hwcap |= HWCAP_FPU;
		has_fpu = true;
	}
	if (cpu_cfgid & 0x0010)
		elf_hwcap |= HWCAP_STRING;

	if (__nds32__mfsr(NDS32_SR_MMU_CFG) & MMU_CFG_mskDE)
		endianness = "MSB";
	else
		endianness = "LSB";

	if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskEDM)
		elf_hwcap |= HWCAP_EDM;

	if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskLMDMA)
		elf_hwcap |= HWCAP_LMDMA;

	if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskPFM)
		elf_hwcap |= HWCAP_PFM;

	if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskHSMP)
		elf_hwcap |= HWCAP_HSMP;

	if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskTRACE)
		elf_hwcap |= HWCAP_TRACE;

	if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskAUDIO)
		elf_hwcap |= HWCAP_AUDIO;

	if (__nds32__mfsr(NDS32_SR_MSC_CFG) & MSC_CFG_mskL2C)
		elf_hwcap |= HWCAP_L2C;

#ifdef CONFIG_HW_PRE
	if (__nds32__mfsr(NDS32_SR_MISC_CTL) & MISC_CTL_makHWPRE_EN)
		elf_hwcap |= HWCAP_HWPRE;
#endif

	tmp = __nds32__mfsr(NDS32_SR_CACHE_CTL);
	if (!IS_ENABLED(CONFIG_CPU_DCACHE_DISABLE))
		tmp |= CACHE_CTL_mskDC_EN;

	if (!IS_ENABLED(CONFIG_CPU_ICACHE_DISABLE))
		tmp |= CACHE_CTL_mskIC_EN;
	__nds32__mtsr_isb(tmp, NDS32_SR_CACHE_CTL);

	dump_cpu_info(smp_processor_id());
}