static int emulate_ldd()

in kernel/unaligned.c [194:266]


static int emulate_ldd(struct pt_regs *regs, int toreg, int flop)
{
	unsigned long saddr = regs->ior;
	__u64 val = 0;
	int ret;

	DPRINTF("load " RFMT ":" RFMT " to r%d for 8 bytes\n", 
		regs->isr, regs->ior, toreg);
#ifdef CONFIG_PA20

#ifndef CONFIG_64BIT
	if (!flop)
		return -1;
#endif
	__asm__ __volatile__  (
"	depd,z	%3,60,3,%%r19\n"		/* r19=(ofs&7)*8 */
"	mtsp	%4, %%sr1\n"
"	depd	%%r0,63,3,%3\n"
"1:	ldd	0(%%sr1,%3),%0\n"
"2:	ldd	8(%%sr1,%3),%%r20\n"
"	subi	64,%%r19,%%r19\n"
"	mtsar	%%r19\n"
"	shrpd	%0,%%r20,%%sar,%0\n"
"	copy	%%r0, %1\n"
"3:	\n"
"	.section .fixup,\"ax\"\n"
"4:	ldi	-2, %1\n"
	FIXUP_BRANCH(3b)
"	.previous\n"
	ASM_EXCEPTIONTABLE_ENTRY(1b,4b)
	ASM_EXCEPTIONTABLE_ENTRY(2b,4b)
	: "=r" (val), "=r" (ret)
	: "0" (val), "r" (saddr), "r" (regs->isr)
	: "r19", "r20", FIXUP_BRANCH_CLOBBER );
#else
    {
	unsigned long valh=0,vall=0;
	__asm__ __volatile__  (
"	zdep	%5,29,2,%%r19\n"		/* r19=(ofs&3)*8 */
"	mtsp	%6, %%sr1\n"
"	dep	%%r0,31,2,%5\n"
"1:	ldw	0(%%sr1,%5),%0\n"
"2:	ldw	4(%%sr1,%5),%1\n"
"3:	ldw	8(%%sr1,%5),%%r20\n"
"	subi	32,%%r19,%%r19\n"
"	mtsar	%%r19\n"
"	vshd	%0,%1,%0\n"
"	vshd	%1,%%r20,%1\n"
"	copy	%%r0, %2\n"
"4:	\n"
"	.section .fixup,\"ax\"\n"
"5:	ldi	-2, %2\n"
	FIXUP_BRANCH(4b)
"	.previous\n"
	ASM_EXCEPTIONTABLE_ENTRY(1b,5b)
	ASM_EXCEPTIONTABLE_ENTRY(2b,5b)
	ASM_EXCEPTIONTABLE_ENTRY(3b,5b)
	: "=r" (valh), "=r" (vall), "=r" (ret)
	: "0" (valh), "1" (vall), "r" (saddr), "r" (regs->isr)
	: "r19", "r20", FIXUP_BRANCH_CLOBBER );
	val=((__u64)valh<<32)|(__u64)vall;
    }
#endif

	DPRINTF("val = 0x%llx\n", val);

	if (flop)
		regs->fr[toreg] = val;
	else if (toreg)
		regs->gr[toreg] = val;

	return ret;
}