kernel/head_40x.S [315:351]:
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	andc.	r9, r9, r11		/* Check permission */
	bne	5f

	rlwinm	r9, r11, 1, _PAGE_RW	/* dirty => rw */
	and	r9, r9, r11		/* hwwrite = dirty & rw */
	rlwimi	r11, r9, 0, _PAGE_RW	/* replace rw by hwwrite */

	/* Create TLB tag.  This is the faulting address plus a static
	 * set of bits.  These are size, valid, E, U0.
	*/
	li	r9, 0x00c0
	rlwimi	r10, r9, 0, 20, 31

	b	finish_tlb_load

2:	/* Check for possible large-page pmd entry */
	rlwinm.	r9, r11, 2, 22, 24
	beq	5f

	/* Create TLB tag.  This is the faulting address, plus a static
	 * set of bits (valid, E, U0) plus the size from the PMD.
	 */
	ori	r9, r9, 0x40
	rlwimi	r10, r9, 0, 20, 31

	b	finish_tlb_load

5:
	/* The bailout.  Restore registers to pre-exception conditions
	 * and call the heavyweights to help us out.
	 */
	mtspr	SPRN_PID, r12
	mtcrf	0x80, r12
	mfspr	r9, SPRN_SPRG_SCRATCH4
	mfspr	r12, SPRN_SPRG_SCRATCH3
	mfspr	r11, SPRN_SPRG_SCRATCH6
	mfspr	r10, SPRN_SPRG_SCRATCH5
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kernel/head_40x.S [399:435]:
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	andc.	r9, r9, r11		/* Check permission */
	bne	5f

	rlwinm	r9, r11, 1, _PAGE_RW	/* dirty => rw */
	and	r9, r9, r11		/* hwwrite = dirty & rw */
	rlwimi	r11, r9, 0, _PAGE_RW	/* replace rw by hwwrite */

	/* Create TLB tag.  This is the faulting address plus a static
	 * set of bits.  These are size, valid, E, U0.
	*/
	li	r9, 0x00c0
	rlwimi	r10, r9, 0, 20, 31

	b	finish_tlb_load

2:	/* Check for possible large-page pmd entry */
	rlwinm.	r9, r11, 2, 22, 24
	beq	5f

	/* Create TLB tag.  This is the faulting address, plus a static
	 * set of bits (valid, E, U0) plus the size from the PMD.
	 */
	ori	r9, r9, 0x40
	rlwimi	r10, r9, 0, 20, 31

	b	finish_tlb_load

5:
	/* The bailout.  Restore registers to pre-exception conditions
	 * and call the heavyweights to help us out.
	 */
	mtspr	SPRN_PID, r12
	mtcrf	0x80, r12
	mfspr	r9, SPRN_SPRG_SCRATCH4
	mfspr	r12, SPRN_SPRG_SCRATCH3
	mfspr	r11, SPRN_SPRG_SCRATCH6
	mfspr	r10, SPRN_SPRG_SCRATCH5
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