int kvmppc_booke_emulate_mtspr()

in kvm/booke_emulate.c [120:377]

• 194 lines of code
• 56 McCabe index (conditional complexity)

int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
{
	int emulated = EMULATE_DONE;
	bool debug_inst = false;

	switch (sprn) {
	case SPRN_DEAR:
		vcpu->arch.shared->dar = spr_val;
		break;
	case SPRN_ESR:
		vcpu->arch.shared->esr = spr_val;
		break;
	case SPRN_CSRR0:
		vcpu->arch.csrr0 = spr_val;
		break;
	case SPRN_CSRR1:
		vcpu->arch.csrr1 = spr_val;
		break;
	case SPRN_DSRR0:
		vcpu->arch.dsrr0 = spr_val;
		break;
	case SPRN_DSRR1:
		vcpu->arch.dsrr1 = spr_val;
		break;
	case SPRN_IAC1:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.iac1 = spr_val;
		break;
	case SPRN_IAC2:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.iac2 = spr_val;
		break;
#if CONFIG_PPC_ADV_DEBUG_IACS > 2
	case SPRN_IAC3:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.iac3 = spr_val;
		break;
	case SPRN_IAC4:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.iac4 = spr_val;
		break;
#endif
	case SPRN_DAC1:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.dac1 = spr_val;
		break;
	case SPRN_DAC2:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.dac2 = spr_val;
		break;
	case SPRN_DBCR0:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		spr_val &= (DBCR0_IDM | DBCR0_IC | DBCR0_BT | DBCR0_TIE |
			DBCR0_IAC1 | DBCR0_IAC2 | DBCR0_IAC3 | DBCR0_IAC4  |
			DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W);

		vcpu->arch.dbg_reg.dbcr0 = spr_val;
		break;
	case SPRN_DBCR1:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.dbcr1 = spr_val;
		break;
	case SPRN_DBCR2:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		debug_inst = true;
		vcpu->arch.dbg_reg.dbcr2 = spr_val;
		break;
	case SPRN_DBSR:
		/*
		 * If userspace is debugging guest then guest
		 * can not access debug registers.
		 */
		if (vcpu->guest_debug)
			break;

		vcpu->arch.dbsr &= ~spr_val;
		if (!(vcpu->arch.dbsr & ~DBSR_IDE))
			kvmppc_core_dequeue_debug(vcpu);
		break;
	case SPRN_TSR:
		kvmppc_clr_tsr_bits(vcpu, spr_val);
		break;
	case SPRN_TCR:
		/*
		 * WRC is a 2-bit field that is supposed to preserve its
		 * value once written to non-zero.
		 */
		if (vcpu->arch.tcr & TCR_WRC_MASK) {
			spr_val &= ~TCR_WRC_MASK;
			spr_val |= vcpu->arch.tcr & TCR_WRC_MASK;
		}
		kvmppc_set_tcr(vcpu, spr_val);
		break;

	case SPRN_DECAR:
		vcpu->arch.decar = spr_val;
		break;
	/*
	 * Note: SPRG4-7 are user-readable.
	 * These values are loaded into the real SPRGs when resuming the
	 * guest (PR-mode only).
	 */
	case SPRN_SPRG4:
		kvmppc_set_sprg4(vcpu, spr_val);
		break;
	case SPRN_SPRG5:
		kvmppc_set_sprg5(vcpu, spr_val);
		break;
	case SPRN_SPRG6:
		kvmppc_set_sprg6(vcpu, spr_val);
		break;
	case SPRN_SPRG7:
		kvmppc_set_sprg7(vcpu, spr_val);
		break;

	case SPRN_IVPR:
		vcpu->arch.ivpr = spr_val;
#ifdef CONFIG_KVM_BOOKE_HV
		mtspr(SPRN_GIVPR, spr_val);
#endif
		break;
	case SPRN_IVOR0:
		vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val;
		break;
	case SPRN_IVOR1:
		vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = spr_val;
		break;
	case SPRN_IVOR2:
		vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val;
#ifdef CONFIG_KVM_BOOKE_HV
		mtspr(SPRN_GIVOR2, spr_val);
#endif
		break;
	case SPRN_IVOR3:
		vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val;
		break;
	case SPRN_IVOR4:
		vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val;
		break;
	case SPRN_IVOR5:
		vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = spr_val;
		break;
	case SPRN_IVOR6:
		vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = spr_val;
		break;
	case SPRN_IVOR7:
		vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = spr_val;
		break;
	case SPRN_IVOR8:
		vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val;
#ifdef CONFIG_KVM_BOOKE_HV
		mtspr(SPRN_GIVOR8, spr_val);
#endif
		break;
	case SPRN_IVOR9:
		vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val;
		break;
	case SPRN_IVOR10:
		vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = spr_val;
		break;
	case SPRN_IVOR11:
		vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = spr_val;
		break;
	case SPRN_IVOR12:
		vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = spr_val;
		break;
	case SPRN_IVOR13:
		vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = spr_val;
		break;
	case SPRN_IVOR14:
		vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = spr_val;
		break;
	case SPRN_IVOR15:
		vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val;
		break;
	case SPRN_MCSR:
		vcpu->arch.mcsr &= ~spr_val;
		break;
#if defined(CONFIG_64BIT)
	case SPRN_EPCR:
		kvmppc_set_epcr(vcpu, spr_val);
#ifdef CONFIG_KVM_BOOKE_HV
		mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr);
#endif
		break;
#endif
	default:
		emulated = EMULATE_FAIL;
	}

	if (debug_inst) {
		current->thread.debug = vcpu->arch.dbg_reg;
		switch_booke_debug_regs(&vcpu->arch.dbg_reg);
	}
	return emulated;
}