static int ia_init()

in iphase.c [2314:2425]

• 78 lines of code
• 9 McCabe index (conditional complexity)

static int ia_init(struct atm_dev *dev)
{  
	IADEV *iadev;  
	unsigned long real_base;
	void __iomem *base;
	unsigned short command;  
	int error, i; 
	  
	/* The device has been identified and registered. Now we read   
	   necessary configuration info like memory base address,   
	   interrupt number etc */  
	  
	IF_INIT(printk(">ia_init\n");)  
	dev->ci_range.vpi_bits = 0;  
	dev->ci_range.vci_bits = NR_VCI_LD;  

	iadev = INPH_IA_DEV(dev);  
	real_base = pci_resource_start (iadev->pci, 0);
	iadev->irq = iadev->pci->irq;
		  
	error = pci_read_config_word(iadev->pci, PCI_COMMAND, &command);
	if (error) {
		printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%x\n",  
				dev->number,error);  
		return -EINVAL;  
	}  
	IF_INIT(printk(DEV_LABEL "(itf %d): rev.%d,realbase=0x%lx,irq=%d\n",  
			dev->number, iadev->pci->revision, real_base, iadev->irq);)
	  
	/* find mapping size of board */  
	  
	iadev->pci_map_size = pci_resource_len(iadev->pci, 0);

        if (iadev->pci_map_size == 0x100000){
          iadev->num_vc = 4096;
	  dev->ci_range.vci_bits = NR_VCI_4K_LD;  
          iadev->memSize = 4;
        }
        else if (iadev->pci_map_size == 0x40000) {
          iadev->num_vc = 1024;
          iadev->memSize = 1;
        }
        else {
           printk("Unknown pci_map_size = 0x%x\n", iadev->pci_map_size);
           return -EINVAL;
        }
	IF_INIT(printk (DEV_LABEL "map size: %i\n", iadev->pci_map_size);)  
	  
	/* enable bus mastering */
	pci_set_master(iadev->pci);

	/*  
	 * Delay at least 1us before doing any mem accesses (how 'bout 10?)  
	 */  
	udelay(10);  
	  
	/* mapping the physical address to a virtual address in address space */  
	base = ioremap(real_base,iadev->pci_map_size);  /* ioremap is not resolved ??? */  
	  
	if (!base)  
	{  
		printk(DEV_LABEL " (itf %d): can't set up page mapping\n",  
			    dev->number);  
		return -ENOMEM;
	}  
	IF_INIT(printk(DEV_LABEL " (itf %d): rev.%d,base=%p,irq=%d\n",  
			dev->number, iadev->pci->revision, base, iadev->irq);)
	  
	/* filling the iphase dev structure */  
	iadev->mem = iadev->pci_map_size /2;  
	iadev->real_base = real_base;  
	iadev->base = base;  
		  
	/* Bus Interface Control Registers */  
	iadev->reg = base + REG_BASE;
	/* Segmentation Control Registers */  
	iadev->seg_reg = base + SEG_BASE;
	/* Reassembly Control Registers */  
	iadev->reass_reg = base + REASS_BASE;  
	/* Front end/ DMA control registers */  
	iadev->phy = base + PHY_BASE;  
	iadev->dma = base + PHY_BASE;  
	/* RAM - Segmentation RAm and Reassembly RAM */  
	iadev->ram = base + ACTUAL_RAM_BASE;  
	iadev->seg_ram = base + ACTUAL_SEG_RAM_BASE;  
	iadev->reass_ram = base + ACTUAL_REASS_RAM_BASE;  
  
	/* lets print out the above */  
	IF_INIT(printk("Base addrs: %p %p %p \n %p %p %p %p\n", 
          iadev->reg,iadev->seg_reg,iadev->reass_reg, 
          iadev->phy, iadev->ram, iadev->seg_ram, 
          iadev->reass_ram);) 
	  
	/* lets try reading the MAC address */  
	error = get_esi(dev);  
	if (error) {
	  iounmap(iadev->base);
	  return error;  
	}
        printk("IA: ");
	for (i=0; i < ESI_LEN; i++)  
                printk("%s%02X",i ? "-" : "",dev->esi[i]);  
        printk("\n");  
  
        /* reset SAR */  
        if (reset_sar(dev)) {
	   iounmap(iadev->base);
           printk("IA: reset SAR fail, please try again\n");
           return 1;
        }
	return 0;  
}