in driver_pci_host.c [148:228]
static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
unsigned int func, unsigned int off,
const void *buf, int len)
{
int err = -EINVAL;
u32 addr, val;
void __iomem *mmio = 0;
u16 chipid = pc->core->bus->chipinfo.id;
WARN_ON(!pc->hostmode);
if (unlikely(len != 1 && len != 2 && len != 4))
goto out;
if (dev == 0) {
/* we support only two functions on device 0 */
if (func > 1)
goto out;
/* accesses to config registers with offsets >= 256
* requires indirect access.
*/
if (off >= PCI_CONFIG_SPACE_SIZE) {
addr = (func << 12);
addr |= (off & 0x0FFC);
val = bcma_pcie_read_config(pc, addr);
} else {
addr = BCMA_CORE_PCI_PCICFG0;
addr |= (func << 8);
addr |= (off & 0xFC);
val = pcicore_read32(pc, addr);
}
} else {
addr = bcma_get_cfgspace_addr(pc, dev, func, off);
if (unlikely(!addr))
goto out;
err = -ENOMEM;
mmio = ioremap(addr, sizeof(val));
if (!mmio)
goto out;
if (mips_busprobe32(val, mmio)) {
val = 0xFFFFFFFF;
goto unmap;
}
}
switch (len) {
case 1:
val &= ~(0xFF << (8 * (off & 3)));
val |= *((const u8 *)buf) << (8 * (off & 3));
break;
case 2:
val &= ~(0xFFFF << (8 * (off & 3)));
val |= *((const u16 *)buf) << (8 * (off & 3));
break;
case 4:
val = *((const u32 *)buf);
break;
}
if (dev == 0) {
/* accesses to config registers with offsets >= 256
* requires indirect access.
*/
if (off >= PCI_CONFIG_SPACE_SIZE)
bcma_pcie_write_config(pc, addr, val);
else
pcicore_write32(pc, addr, val);
} else {
writel(val, mmio);
if (chipid == BCMA_CHIP_ID_BCM4716 ||
chipid == BCMA_CHIP_ID_BCM4748)
readl(mmio);
}
err = 0;
unmap:
if (mmio)
iounmap(mmio);
out:
return err;
}