static void qcom_ebi2_setup_chipselect()

in qcom-ebi2.c [226:290]

• 53 lines of code
• 10 McCabe index (conditional complexity)

static void qcom_ebi2_setup_chipselect(struct device_node *np,
				       struct device *dev,
				       void __iomem *ebi2_base,
				       void __iomem *ebi2_xmem,
				       u32 csindex)
{
	const struct cs_data *csd;
	u32 slowcfg, fastcfg;
	u32 val;
	int ret;
	int i;

	csd = &cs_info[csindex];
	val = readl(ebi2_base);
	val |= csd->enable_mask;
	writel(val, ebi2_base);
	dev_dbg(dev, "enabled CS%u\n", csindex);

	/* Next set up the XMEMC */
	slowcfg = 0;
	fastcfg = 0;

	for (i = 0; i < ARRAY_SIZE(xmem_props); i++) {
		const struct ebi2_xmem_prop *xp = &xmem_props[i];

		/* All are regular u32 values */
		ret = of_property_read_u32(np, xp->prop, &val);
		if (ret) {
			dev_dbg(dev, "could not read %s for CS%d\n",
				xp->prop, csindex);
			continue;
		}

		/* First check boolean props */
		if (xp->max == 1 && val) {
			if (xp->slowreg)
				slowcfg |= BIT(xp->shift);
			else
				fastcfg |= BIT(xp->shift);
			dev_dbg(dev, "set %s flag\n", xp->prop);
			continue;
		}

		/* We're dealing with an u32 */
		if (val > xp->max) {
			dev_err(dev,
				"too high value for %s: %u, capped at %u\n",
				xp->prop, val, xp->max);
			val = xp->max;
		}
		if (xp->slowreg)
			slowcfg |= (val << xp->shift);
		else
			fastcfg |= (val << xp->shift);
		dev_dbg(dev, "set %s to %u\n", xp->prop, val);
	}

	dev_info(dev, "CS%u: SLOW CFG 0x%08x, FAST CFG 0x%08x\n",
		 csindex, slowcfg, fastcfg);

	if (slowcfg)
		writel(slowcfg, ebi2_xmem + csd->slow_cfg);
	if (fastcfg)
		writel(fastcfg, ebi2_xmem + csd->fast_cfg);
}