in sunxi-ng/ccu-sun4i-a10.c [285:450]
static SUNXI_CCU_MP_WITH_MUX(apb1_clk, "apb1", apb1_parents, 0x058,
0, 5, /* M */
16, 2, /* P */
24, 2, /* mux */
0);
/* Not present on A20 */
static SUNXI_CCU_GATE(axi_dram_clk, "axi-dram", "ahb",
0x05c, BIT(31), 0);
static SUNXI_CCU_GATE(ahb_otg_clk, "ahb-otg", "ahb",
0x060, BIT(0), 0);
static SUNXI_CCU_GATE(ahb_ehci0_clk, "ahb-ehci0", "ahb",
0x060, BIT(1), 0);
static SUNXI_CCU_GATE(ahb_ohci0_clk, "ahb-ohci0", "ahb",
0x060, BIT(2), 0);
static SUNXI_CCU_GATE(ahb_ehci1_clk, "ahb-ehci1", "ahb",
0x060, BIT(3), 0);
static SUNXI_CCU_GATE(ahb_ohci1_clk, "ahb-ohci1", "ahb",
0x060, BIT(4), 0);
static SUNXI_CCU_GATE(ahb_ss_clk, "ahb-ss", "ahb",
0x060, BIT(5), 0);
static SUNXI_CCU_GATE(ahb_dma_clk, "ahb-dma", "ahb",
0x060, BIT(6), 0);
static SUNXI_CCU_GATE(ahb_bist_clk, "ahb-bist", "ahb",
0x060, BIT(7), 0);
static SUNXI_CCU_GATE(ahb_mmc0_clk, "ahb-mmc0", "ahb",
0x060, BIT(8), 0);
static SUNXI_CCU_GATE(ahb_mmc1_clk, "ahb-mmc1", "ahb",
0x060, BIT(9), 0);
static SUNXI_CCU_GATE(ahb_mmc2_clk, "ahb-mmc2", "ahb",
0x060, BIT(10), 0);
static SUNXI_CCU_GATE(ahb_mmc3_clk, "ahb-mmc3", "ahb",
0x060, BIT(11), 0);
static SUNXI_CCU_GATE(ahb_ms_clk, "ahb-ms", "ahb",
0x060, BIT(12), 0);
static SUNXI_CCU_GATE(ahb_nand_clk, "ahb-nand", "ahb",
0x060, BIT(13), 0);
static SUNXI_CCU_GATE(ahb_sdram_clk, "ahb-sdram", "ahb",
0x060, BIT(14), CLK_IS_CRITICAL);
static SUNXI_CCU_GATE(ahb_ace_clk, "ahb-ace", "ahb",
0x060, BIT(16), 0);
static SUNXI_CCU_GATE(ahb_emac_clk, "ahb-emac", "ahb",
0x060, BIT(17), 0);
static SUNXI_CCU_GATE(ahb_ts_clk, "ahb-ts", "ahb",
0x060, BIT(18), 0);
static SUNXI_CCU_GATE(ahb_spi0_clk, "ahb-spi0", "ahb",
0x060, BIT(20), 0);
static SUNXI_CCU_GATE(ahb_spi1_clk, "ahb-spi1", "ahb",
0x060, BIT(21), 0);
static SUNXI_CCU_GATE(ahb_spi2_clk, "ahb-spi2", "ahb",
0x060, BIT(22), 0);
static SUNXI_CCU_GATE(ahb_spi3_clk, "ahb-spi3", "ahb",
0x060, BIT(23), 0);
static SUNXI_CCU_GATE(ahb_pata_clk, "ahb-pata", "ahb",
0x060, BIT(24), 0);
/* Not documented on A20 */
static SUNXI_CCU_GATE(ahb_sata_clk, "ahb-sata", "ahb",
0x060, BIT(25), 0);
/* Not present on A20 */
static SUNXI_CCU_GATE(ahb_gps_clk, "ahb-gps", "ahb",
0x060, BIT(26), 0);
/* Not present on A10 */
static SUNXI_CCU_GATE(ahb_hstimer_clk, "ahb-hstimer", "ahb",
0x060, BIT(28), 0);
static SUNXI_CCU_GATE(ahb_ve_clk, "ahb-ve", "ahb",
0x064, BIT(0), 0);
static SUNXI_CCU_GATE(ahb_tvd_clk, "ahb-tvd", "ahb",
0x064, BIT(1), 0);
static SUNXI_CCU_GATE(ahb_tve0_clk, "ahb-tve0", "ahb",
0x064, BIT(2), 0);
static SUNXI_CCU_GATE(ahb_tve1_clk, "ahb-tve1", "ahb",
0x064, BIT(3), 0);
static SUNXI_CCU_GATE(ahb_lcd0_clk, "ahb-lcd0", "ahb",
0x064, BIT(4), 0);
static SUNXI_CCU_GATE(ahb_lcd1_clk, "ahb-lcd1", "ahb",
0x064, BIT(5), 0);
static SUNXI_CCU_GATE(ahb_csi0_clk, "ahb-csi0", "ahb",
0x064, BIT(8), 0);
static SUNXI_CCU_GATE(ahb_csi1_clk, "ahb-csi1", "ahb",
0x064, BIT(9), 0);
/* Not present on A10 */
static SUNXI_CCU_GATE(ahb_hdmi1_clk, "ahb-hdmi1", "ahb",
0x064, BIT(10), 0);
static SUNXI_CCU_GATE(ahb_hdmi0_clk, "ahb-hdmi0", "ahb",
0x064, BIT(11), 0);
static SUNXI_CCU_GATE(ahb_de_be0_clk, "ahb-de-be0", "ahb",
0x064, BIT(12), 0);
static SUNXI_CCU_GATE(ahb_de_be1_clk, "ahb-de-be1", "ahb",
0x064, BIT(13), 0);
static SUNXI_CCU_GATE(ahb_de_fe0_clk, "ahb-de-fe0", "ahb",
0x064, BIT(14), 0);
static SUNXI_CCU_GATE(ahb_de_fe1_clk, "ahb-de-fe1", "ahb",
0x064, BIT(15), 0);
/* Not present on A10 */
static SUNXI_CCU_GATE(ahb_gmac_clk, "ahb-gmac", "ahb",
0x064, BIT(17), 0);
static SUNXI_CCU_GATE(ahb_mp_clk, "ahb-mp", "ahb",
0x064, BIT(18), 0);
static SUNXI_CCU_GATE(ahb_gpu_clk, "ahb-gpu", "ahb",
0x064, BIT(20), 0);
static SUNXI_CCU_GATE(apb0_codec_clk, "apb0-codec", "apb0",
0x068, BIT(0), 0);
static SUNXI_CCU_GATE(apb0_spdif_clk, "apb0-spdif", "apb0",
0x068, BIT(1), 0);
static SUNXI_CCU_GATE(apb0_ac97_clk, "apb0-ac97", "apb0",
0x068, BIT(2), 0);
static SUNXI_CCU_GATE(apb0_i2s0_clk, "apb0-i2s0", "apb0",
0x068, BIT(3), 0);
/* Not present on A10 */
static SUNXI_CCU_GATE(apb0_i2s1_clk, "apb0-i2s1", "apb0",
0x068, BIT(4), 0);
static SUNXI_CCU_GATE(apb0_pio_clk, "apb0-pio", "apb0",
0x068, BIT(5), 0);
static SUNXI_CCU_GATE(apb0_ir0_clk, "apb0-ir0", "apb0",
0x068, BIT(6), 0);
static SUNXI_CCU_GATE(apb0_ir1_clk, "apb0-ir1", "apb0",
0x068, BIT(7), 0);
/* Not present on A10 */
static SUNXI_CCU_GATE(apb0_i2s2_clk, "apb0-i2s2", "apb0",
0x068, BIT(8), 0);
static SUNXI_CCU_GATE(apb0_keypad_clk, "apb0-keypad", "apb0",
0x068, BIT(10), 0);
static SUNXI_CCU_GATE(apb1_i2c0_clk, "apb1-i2c0", "apb1",
0x06c, BIT(0), 0);
static SUNXI_CCU_GATE(apb1_i2c1_clk, "apb1-i2c1", "apb1",
0x06c, BIT(1), 0);
static SUNXI_CCU_GATE(apb1_i2c2_clk, "apb1-i2c2", "apb1",
0x06c, BIT(2), 0);
/* Not present on A10 */
static SUNXI_CCU_GATE(apb1_i2c3_clk, "apb1-i2c3", "apb1",
0x06c, BIT(3), 0);
static SUNXI_CCU_GATE(apb1_can_clk, "apb1-can", "apb1",
0x06c, BIT(4), 0);
static SUNXI_CCU_GATE(apb1_scr_clk, "apb1-scr", "apb1",
0x06c, BIT(5), 0);
static SUNXI_CCU_GATE(apb1_ps20_clk, "apb1-ps20", "apb1",
0x06c, BIT(6), 0);
static SUNXI_CCU_GATE(apb1_ps21_clk, "apb1-ps21", "apb1",
0x06c, BIT(7), 0);
/* Not present on A10 */
static SUNXI_CCU_GATE(apb1_i2c4_clk, "apb1-i2c4", "apb1",
0x06c, BIT(15), 0);
static SUNXI_CCU_GATE(apb1_uart0_clk, "apb1-uart0", "apb1",
0x06c, BIT(16), 0);
static SUNXI_CCU_GATE(apb1_uart1_clk, "apb1-uart1", "apb1",
0x06c, BIT(17), 0);
static SUNXI_CCU_GATE(apb1_uart2_clk, "apb1-uart2", "apb1",
0x06c, BIT(18), 0);
static SUNXI_CCU_GATE(apb1_uart3_clk, "apb1-uart3", "apb1",
0x06c, BIT(19), 0);
static SUNXI_CCU_GATE(apb1_uart4_clk, "apb1-uart4", "apb1",
0x06c, BIT(20), 0);
static SUNXI_CCU_GATE(apb1_uart5_clk, "apb1-uart5", "apb1",
0x06c, BIT(21), 0);
static SUNXI_CCU_GATE(apb1_uart6_clk, "apb1-uart6", "apb1",
0x06c, BIT(22), 0);
static SUNXI_CCU_GATE(apb1_uart7_clk, "apb1-uart7", "apb1",
0x06c, BIT(23), 0);
static const char *const mod0_default_parents[] = { "hosc", "pll-periph",
"pll-ddr-other" };