static int __init timer_get_base_and_rate()

in dw_apb_timer_of.c [17:83]

• 49 lines of code
• 11 McCabe index (conditional complexity)

static int __init timer_get_base_and_rate(struct device_node *np,
				    void __iomem **base, u32 *rate)
{
	struct clk *timer_clk;
	struct clk *pclk;
	struct reset_control *rstc;
	int ret;

	*base = of_iomap(np, 0);

	if (!*base)
		panic("Unable to map regs for %pOFn", np);

	/*
	 * Reset the timer if the reset control is available, wiping
	 * out the state the firmware may have left it
	 */
	rstc = of_reset_control_get(np, NULL);
	if (!IS_ERR(rstc)) {
		reset_control_assert(rstc);
		reset_control_deassert(rstc);
	}

	/*
	 * Not all implementations use a peripheral clock, so don't panic
	 * if it's not present
	 */
	pclk = of_clk_get_by_name(np, "pclk");
	if (!IS_ERR(pclk))
		if (clk_prepare_enable(pclk))
			pr_warn("pclk for %pOFn is present, but could not be activated\n",
				np);

	if (!of_property_read_u32(np, "clock-freq", rate) ||
	    !of_property_read_u32(np, "clock-frequency", rate))
		return 0;

	timer_clk = of_clk_get_by_name(np, "timer");
	if (IS_ERR(timer_clk)) {
		ret = PTR_ERR(timer_clk);
		goto out_pclk_disable;
	}

	ret = clk_prepare_enable(timer_clk);
	if (ret)
		goto out_timer_clk_put;

	*rate = clk_get_rate(timer_clk);
	if (!(*rate)) {
		ret = -EINVAL;
		goto out_timer_clk_disable;
	}

	return 0;

out_timer_clk_disable:
	clk_disable_unprepare(timer_clk);
out_timer_clk_put:
	clk_put(timer_clk);
out_pclk_disable:
	if (!IS_ERR(pclk)) {
		clk_disable_unprepare(pclk);
		clk_put(pclk);
	}
	iounmap(*base);
	return ret;
}