in timer-davinci.c [242:333]
int __init davinci_timer_register(struct clk *clk,
const struct davinci_timer_cfg *timer_cfg)
{
struct davinci_clockevent *clockevent;
unsigned int tick_rate;
void __iomem *base;
int rv;
rv = clk_prepare_enable(clk);
if (rv) {
pr_err("Unable to prepare and enable the timer clock\n");
return rv;
}
if (!request_mem_region(timer_cfg->reg.start,
resource_size(&timer_cfg->reg),
"davinci-timer")) {
pr_err("Unable to request memory region\n");
return -EBUSY;
}
base = ioremap(timer_cfg->reg.start, resource_size(&timer_cfg->reg));
if (!base) {
pr_err("Unable to map the register range\n");
return -ENOMEM;
}
davinci_timer_init(base);
tick_rate = clk_get_rate(clk);
clockevent = kzalloc(sizeof(*clockevent), GFP_KERNEL);
if (!clockevent)
return -ENOMEM;
clockevent->dev.name = "tim12";
clockevent->dev.features = CLOCK_EVT_FEAT_ONESHOT;
clockevent->dev.cpumask = cpumask_of(0);
clockevent->base = base;
if (timer_cfg->cmp_off) {
clockevent->cmp_off = timer_cfg->cmp_off;
clockevent->dev.set_next_event =
davinci_clockevent_set_next_event_cmp;
} else {
clockevent->dev.set_next_event =
davinci_clockevent_set_next_event_std;
clockevent->dev.set_state_oneshot =
davinci_clockevent_set_oneshot;
clockevent->dev.set_state_shutdown =
davinci_clockevent_shutdown;
}
rv = request_irq(timer_cfg->irq[DAVINCI_TIMER_CLOCKEVENT_IRQ].start,
davinci_timer_irq_timer, IRQF_TIMER,
"clockevent/tim12", clockevent);
if (rv) {
pr_err("Unable to request the clockevent interrupt\n");
return rv;
}
davinci_clocksource.dev.rating = 300;
davinci_clocksource.dev.read = davinci_clocksource_read;
davinci_clocksource.dev.mask =
CLOCKSOURCE_MASK(DAVINCI_TIMER_CLKSRC_BITS);
davinci_clocksource.dev.flags = CLOCK_SOURCE_IS_CONTINUOUS;
davinci_clocksource.base = base;
if (timer_cfg->cmp_off) {
davinci_clocksource.dev.name = "tim12";
davinci_clocksource.tim_off = DAVINCI_TIMER_REG_TIM12;
davinci_clocksource_init_tim12(base);
} else {
davinci_clocksource.dev.name = "tim34";
davinci_clocksource.tim_off = DAVINCI_TIMER_REG_TIM34;
davinci_clocksource_init_tim34(base);
}
clockevents_config_and_register(&clockevent->dev, tick_rate,
DAVINCI_TIMER_MIN_DELTA,
DAVINCI_TIMER_MAX_DELTA);
rv = clocksource_register_hz(&davinci_clocksource.dev, tick_rate);
if (rv) {
pr_err("Unable to register clocksource\n");
return rv;
}
sched_clock_register(davinci_timer_read_sched_clock,
DAVINCI_TIMER_CLKSRC_BITS, tick_rate);
return 0;
}