in timer-ixp4xx.c [164:230]
static __init int ixp4xx_timer_register(void __iomem *base,
int timer_irq,
unsigned int timer_freq)
{
struct ixp4xx_timer *tmr;
int ret;
tmr = kzalloc(sizeof(*tmr), GFP_KERNEL);
if (!tmr)
return -ENOMEM;
tmr->base = base;
/*
* The timer register doesn't allow to specify the two least
* significant bits of the timeout value and assumes them being zero.
* So make sure the latch is the best value with the two least
* significant bits unset.
*/
tmr->latch = DIV_ROUND_CLOSEST(timer_freq,
(IXP4XX_OST_RELOAD_MASK + 1) * HZ)
* (IXP4XX_OST_RELOAD_MASK + 1);
local_ixp4xx_timer = tmr;
/* Reset/disable counter */
__raw_writel(0, tmr->base + IXP4XX_OSRT1_OFFSET);
/* Clear any pending interrupt on timer 1 */
__raw_writel(IXP4XX_OSST_TIMER_1_PEND,
tmr->base + IXP4XX_OSST_OFFSET);
/* Reset time-stamp counter */
__raw_writel(0, tmr->base + IXP4XX_OSTS_OFFSET);
clocksource_mmio_init(NULL, "OSTS", timer_freq, 200, 32,
ixp4xx_clocksource_read);
tmr->clkevt.name = "ixp4xx timer1";
tmr->clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
tmr->clkevt.rating = 200;
tmr->clkevt.set_state_shutdown = ixp4xx_shutdown;
tmr->clkevt.set_state_periodic = ixp4xx_set_periodic;
tmr->clkevt.set_state_oneshot = ixp4xx_set_oneshot;
tmr->clkevt.tick_resume = ixp4xx_resume;
tmr->clkevt.set_next_event = ixp4xx_set_next_event;
tmr->clkevt.cpumask = cpumask_of(0);
tmr->clkevt.irq = timer_irq;
ret = request_irq(timer_irq, ixp4xx_timer_interrupt,
IRQF_TIMER, "IXP4XX-TIMER1", tmr);
if (ret) {
pr_crit("no timer IRQ\n");
return -ENODEV;
}
clockevents_config_and_register(&tmr->clkevt, timer_freq,
0xf, 0xfffffffe);
sched_clock_register(ixp4xx_read_sched_clock, 32, timer_freq);
#ifdef CONFIG_ARM
/* Also use this timer for delays */
tmr->delay_timer.read_current_timer = ixp4xx_read_timer;
tmr->delay_timer.freq = timer_freq;
register_current_timer_delay(&tmr->delay_timer);
#endif
return 0;
}