in 104-quad-8.c [610:656]
static int quad8_count_mode_write(struct counter_device *counter,
struct counter_count *count,
enum counter_count_mode cnt_mode)
{
struct quad8 *const priv = counter_priv(counter);
unsigned int count_mode;
unsigned int mode_cfg;
const int base_offset = priv->base + 2 * count->id + 1;
unsigned long irqflags;
/* Map Generic Counter count mode to 104-QUAD-8 count mode */
switch (cnt_mode) {
case COUNTER_COUNT_MODE_NORMAL:
count_mode = 0;
break;
case COUNTER_COUNT_MODE_RANGE_LIMIT:
count_mode = 1;
break;
case COUNTER_COUNT_MODE_NON_RECYCLE:
count_mode = 2;
break;
case COUNTER_COUNT_MODE_MODULO_N:
count_mode = 3;
break;
default:
/* should never reach this path */
return -EINVAL;
}
spin_lock_irqsave(&priv->lock, irqflags);
priv->count_mode[count->id] = count_mode;
/* Set count mode configuration value */
mode_cfg = count_mode << 1;
/* Add quadrature mode configuration */
if (priv->quadrature_mode[count->id])
mode_cfg |= (priv->quadrature_scale[count->id] + 1) << 3;
/* Load mode configuration to Counter Mode Register */
outb(QUAD8_CTR_CMR | mode_cfg, base_offset);
spin_unlock_irqrestore(&priv->lock, irqflags);
return 0;
}