in cpuidle-cps.c [23:67]
static int cps_nc_enter(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
enum cps_pm_state pm_state;
int err;
/*
* At least one core must remain powered up & clocked in order for the
* system to have any hope of functioning.
*
* TODO: don't treat core 0 specially, just prevent the final core
* TODO: remap interrupt affinity temporarily
*/
if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT))
index = STATE_NC_WAIT;
/* Select the appropriate cps_pm_state */
switch (index) {
case STATE_NC_WAIT:
pm_state = CPS_PM_NC_WAIT;
break;
case STATE_CLOCK_GATED:
pm_state = CPS_PM_CLOCK_GATED;
break;
case STATE_POWER_GATED:
pm_state = CPS_PM_POWER_GATED;
break;
default:
BUG();
return -EINVAL;
}
/* Notify listeners the CPU is about to power down */
if ((pm_state == CPS_PM_POWER_GATED) && cpu_pm_enter())
return -EINTR;
/* Enter that state */
err = cps_pm_enter_state(pm_state);
/* Notify listeners the CPU is back up */
if (pm_state == CPS_PM_POWER_GATED)
cpu_pm_exit();
return err ?: index;
}