graph G { compound="true" rankdir="TB" bgcolor="white" fontname="Tahoma" node [ fixedsize="false" fontname="Tahoma" color="white" fillcolor="deepskyblue2" fontcolor="black" shape="box" style="filled" penwidth="1.0" ] edge [ fontname="Arial" color="#00688b" fontcolor="black" fontsize="12" arrowsize="0.5" penwidth="1.0" ] "[machxo2-spi.c]" -- "[dfl.c]" [label=" 37 ", penwidth="10", color="#00688bFF"]; "[dfl.h]" -- "[dfl.c]" [label=" 26 ", penwidth="7", color="#00688bC9"]; "[stratix10-soc.c]" -- "[fpga-mgr.c]" [label=" 25 ", penwidth="6", color="#00688bB7"]; "[dfl.h]" -- "[dfl-pci.c]" [label=" 25 ", penwidth="6", color="#00688bB7"]; "[fpga-bridge.c]" -- "[dfl.c]" [label=" 24 ", penwidth="6", color="#00688bB7"]; "[dfl.c]" -- "[dfl-pci.c]" [label=" 24 ", penwidth="6", color="#00688bB7"]; "[dfl.h]" -- "[dfl-n3000-nios.c]" [label=" 24 ", penwidth="6", color="#00688bB7"]; "[fpga-bridge.c]" -- "[dfl.h]" [label=" 24 ", penwidth="6", color="#00688bB7"]; "[fpga-bridge.c]" -- "[dfl-n3000-nios.c]" [label=" 24 ", penwidth="6", color="#00688bB7"]; "[xilinx-spi.c]" -- "[dfl-pci.c]" [label=" 23 ", penwidth="6", color="#00688bB7"]; "[fpga-bridge.c]" -- "[dfl-pci.c]" [label=" 23 ", penwidth="6", color="#00688bB7"]; "[xilinx-spi.c]" -- "[xilinx-pr-decoupler.c]" [label=" 23 ", penwidth="6", color="#00688bB7"]; "[dfl-pci.c]" -- "[dfl-n3000-nios.c]" [label=" 23 ", penwidth="6", color="#00688bB7"]; "[dfl.c]" -- "[dfl-n3000-nios.c]" [label=" 22 ", penwidth="5", color="#00688bA5"]; "[fpga-bridge.c]" -- "[dfl-fme-perf.c]" [label=" 21 ", penwidth="5", color="#00688bA5"]; "[dfl.c]" -- "[dfl-fme-perf.c]" [label=" 21 ", penwidth="5", color="#00688bA5"]; "[xilinx-pr-decoupler.c]" -- "[dfl-pci.c]" [label=" 21 ", penwidth="5", color="#00688bA5"]; "[dfl.h]" -- "[dfl-fme-perf.c]" [label=" 21 ", penwidth="5", color="#00688bA5"]; "[dfl-pci.c]" -- "[dfl-fme-perf.c]" [label=" 21 ", penwidth="5", color="#00688bA5"]; "[fpga-mgr.c]" -- "[fpga-bridge.c]" [label=" 21 ", penwidth="5", color="#00688bA5"]; "[stratix10-soc.c]" -- "[fpga-bridge.c]" [label=" 21 ", penwidth="5", color="#00688bA5"]; "[fpga-mgr.c]" -- "[dfl-fme-mgr.c]" [label=" 19 ", penwidth="5", color="#00688bA5"]; "[machxo2-spi.c]" -- "[ice40-spi.c]" [label=" 19 ", penwidth="5", color="#00688bA5"]; "[ts73xx-fpga.c]" -- "[dfl-fme-mgr.c]" [label=" 19 ", penwidth="5", color="#00688bA5"]; "[dfl-n3000-nios.c]" -- "[dfl-fme-perf.c]" [label=" 19 ", penwidth="5", color="#00688bA5"]; "[zynqmp-fpga.c]" -- "[fpga-mgr.c]" [label=" 19 ", penwidth="5", color="#00688bA5"]; "[ts73xx-fpga.c]" -- "[fpga-mgr.c]" [label=" 19 ", penwidth="5", color="#00688bA5"]; "[machxo2-spi.c]" -- "[fpga-mgr.c]" [label=" 18 ", penwidth="4", color="#00688b93"]; "[xilinx-spi.c]" -- "[fpga-mgr.c]" [label=" 18 ", penwidth="4", color="#00688b93"]; "[zynqmp-fpga.c]" -- "[xilinx-spi.c]" [label=" 18 ", penwidth="4", color="#00688b93"]; "[xilinx-spi.c]" -- "[ts73xx-fpga.c]" [label=" 18 ", penwidth="4", color="#00688b93"]; "[zynqmp-fpga.c]" -- "[ts73xx-fpga.c]" [label=" 18 ", penwidth="4", color="#00688b93"]; "[zynqmp-fpga.c]" -- "[dfl-fme-mgr.c]" [label=" 18 ", penwidth="4", color="#00688b93"]; "[xilinx-spi.c]" -- "[dfl-fme-mgr.c]" [label=" 18 ", penwidth="4", color="#00688b93"]; "[ts73xx-fpga.c]" -- "[stratix10-soc.c]" [label=" 17 ", penwidth="4", color="#00688b93"]; "[machxo2-spi.c]" -- "[altera-pr-ip-core.c]" [label=" 17 ", penwidth="4", color="#00688b93"]; "[stratix10-soc.c]" -- "[dfl-fme-mgr.c]" [label=" 17 ", penwidth="4", color="#00688b93"]; "[fpga-mgr.c]" -- "[altera-pr-ip-core.c]" [label=" 17 ", penwidth="4", color="#00688b93"]; "[ice40-spi.c]" -- "[dfl.c]" [label=" 16 ", penwidth="4", color="#00688b93"]; "[zynqmp-fpga.c]" -- "[stratix10-soc.c]" [label=" 16 ", penwidth="4", color="#00688b93"]; "[xilinx-spi.c]" -- "[stratix10-soc.c]" [label=" 16 ", penwidth="4", color="#00688b93"]; "[stratix10-soc.c]" -- "[machxo2-spi.c]" [label=" 16 ", penwidth="4", color="#00688b93"]; "[stratix10-soc.c]" -- "[altera-pr-ip-core.c]" [label=" 15 ", penwidth="4", color="#00688b93"]; "[zynq-fpga.c]" -- "[altera-cvp.c]" [label=" 15 ", penwidth="4", color="#00688b93"]; "[zynq-fpga.c]" -- "[ts73xx-fpga.c]" [label=" 14 ", penwidth="3", color="#00688b82"]; "[zynq-fpga.c]" -- "[fpga-mgr.c]" [label=" 14 ", penwidth="3", color="#00688b82"]; "[fpga-mgr.c]" -- "[dfl.c]" [label=" 14 ", penwidth="3", color="#00688b82"]; "[zynq-fpga.c]" -- "[dfl-fme-mgr.c]" [label=" 14 ", penwidth="3", color="#00688b82"]; "[stratix10-soc.c]" -- "[altera-cvp.c]" [label=" 14 ", penwidth="3", color="#00688b82"]; "[zynq-fpga.c]" -- "[fpga-bridge.c]" [label=" 14 ", penwidth="3", color="#00688b82"]; }