in drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c [2820:3456]
static void sienna_cichlid_dump_pptable(struct smu_context *smu)
{
struct smu_table_context *table_context = &smu->smu_table;
PPTable_t *pptable = table_context->driver_pptable;
int i;
if (smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 13)) {
beige_goby_dump_pptable(smu);
return;
}
dev_info(smu->adev->dev, "Dumped PPTable:\n");
dev_info(smu->adev->dev, "Version = 0x%08x\n", pptable->Version);
dev_info(smu->adev->dev, "FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
dev_info(smu->adev->dev, "FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
for (i = 0; i < PPT_THROTTLER_COUNT; i++) {
dev_info(smu->adev->dev, "SocketPowerLimitAc[%d] = 0x%x\n", i, pptable->SocketPowerLimitAc[i]);
dev_info(smu->adev->dev, "SocketPowerLimitAcTau[%d] = 0x%x\n", i, pptable->SocketPowerLimitAcTau[i]);
dev_info(smu->adev->dev, "SocketPowerLimitDc[%d] = 0x%x\n", i, pptable->SocketPowerLimitDc[i]);
dev_info(smu->adev->dev, "SocketPowerLimitDcTau[%d] = 0x%x\n", i, pptable->SocketPowerLimitDcTau[i]);
}
for (i = 0; i < TDC_THROTTLER_COUNT; i++) {
dev_info(smu->adev->dev, "TdcLimit[%d] = 0x%x\n", i, pptable->TdcLimit[i]);
dev_info(smu->adev->dev, "TdcLimitTau[%d] = 0x%x\n", i, pptable->TdcLimitTau[i]);
}
for (i = 0; i < TEMP_COUNT; i++) {
dev_info(smu->adev->dev, "TemperatureLimit[%d] = 0x%x\n", i, pptable->TemperatureLimit[i]);
}
dev_info(smu->adev->dev, "FitLimit = 0x%x\n", pptable->FitLimit);
dev_info(smu->adev->dev, "TotalPowerConfig = 0x%x\n", pptable->TotalPowerConfig);
dev_info(smu->adev->dev, "TotalPowerPadding[0] = 0x%x\n", pptable->TotalPowerPadding[0]);
dev_info(smu->adev->dev, "TotalPowerPadding[1] = 0x%x\n", pptable->TotalPowerPadding[1]);
dev_info(smu->adev->dev, "TotalPowerPadding[2] = 0x%x\n", pptable->TotalPowerPadding[2]);
dev_info(smu->adev->dev, "ApccPlusResidencyLimit = 0x%x\n", pptable->ApccPlusResidencyLimit);
for (i = 0; i < NUM_SMNCLK_DPM_LEVELS; i++) {
dev_info(smu->adev->dev, "SmnclkDpmFreq[%d] = 0x%x\n", i, pptable->SmnclkDpmFreq[i]);
dev_info(smu->adev->dev, "SmnclkDpmVoltage[%d] = 0x%x\n", i, pptable->SmnclkDpmVoltage[i]);
}
dev_info(smu->adev->dev, "ThrottlerControlMask = 0x%x\n", pptable->ThrottlerControlMask);
dev_info(smu->adev->dev, "FwDStateMask = 0x%x\n", pptable->FwDStateMask);
dev_info(smu->adev->dev, "UlvVoltageOffsetSoc = 0x%x\n", pptable->UlvVoltageOffsetSoc);
dev_info(smu->adev->dev, "UlvVoltageOffsetGfx = 0x%x\n", pptable->UlvVoltageOffsetGfx);
dev_info(smu->adev->dev, "MinVoltageUlvGfx = 0x%x\n", pptable->MinVoltageUlvGfx);
dev_info(smu->adev->dev, "MinVoltageUlvSoc = 0x%x\n", pptable->MinVoltageUlvSoc);
dev_info(smu->adev->dev, "SocLIVmin = 0x%x\n", pptable->SocLIVmin);
dev_info(smu->adev->dev, "PaddingLIVmin = 0x%x\n", pptable->PaddingLIVmin);
dev_info(smu->adev->dev, "GceaLinkMgrIdleThreshold = 0x%x\n", pptable->GceaLinkMgrIdleThreshold);
dev_info(smu->adev->dev, "paddingRlcUlvParams[0] = 0x%x\n", pptable->paddingRlcUlvParams[0]);
dev_info(smu->adev->dev, "paddingRlcUlvParams[1] = 0x%x\n", pptable->paddingRlcUlvParams[1]);
dev_info(smu->adev->dev, "paddingRlcUlvParams[2] = 0x%x\n", pptable->paddingRlcUlvParams[2]);
dev_info(smu->adev->dev, "MinVoltageGfx = 0x%x\n", pptable->MinVoltageGfx);
dev_info(smu->adev->dev, "MinVoltageSoc = 0x%x\n", pptable->MinVoltageSoc);
dev_info(smu->adev->dev, "MaxVoltageGfx = 0x%x\n", pptable->MaxVoltageGfx);
dev_info(smu->adev->dev, "MaxVoltageSoc = 0x%x\n", pptable->MaxVoltageSoc);
dev_info(smu->adev->dev, "LoadLineResistanceGfx = 0x%x\n", pptable->LoadLineResistanceGfx);
dev_info(smu->adev->dev, "LoadLineResistanceSoc = 0x%x\n", pptable->LoadLineResistanceSoc);
dev_info(smu->adev->dev, "VDDGFX_TVmin = 0x%x\n", pptable->VDDGFX_TVmin);
dev_info(smu->adev->dev, "VDDSOC_TVmin = 0x%x\n", pptable->VDDSOC_TVmin);
dev_info(smu->adev->dev, "VDDGFX_Vmin_HiTemp = 0x%x\n", pptable->VDDGFX_Vmin_HiTemp);
dev_info(smu->adev->dev, "VDDGFX_Vmin_LoTemp = 0x%x\n", pptable->VDDGFX_Vmin_LoTemp);
dev_info(smu->adev->dev, "VDDSOC_Vmin_HiTemp = 0x%x\n", pptable->VDDSOC_Vmin_HiTemp);
dev_info(smu->adev->dev, "VDDSOC_Vmin_LoTemp = 0x%x\n", pptable->VDDSOC_Vmin_LoTemp);
dev_info(smu->adev->dev, "VDDGFX_TVminHystersis = 0x%x\n", pptable->VDDGFX_TVminHystersis);
dev_info(smu->adev->dev, "VDDSOC_TVminHystersis = 0x%x\n", pptable->VDDSOC_TVminHystersis);
dev_info(smu->adev->dev, "[PPCLK_GFXCLK]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_GFXCLK].VoltageMode,
pptable->DpmDescriptor[PPCLK_GFXCLK].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_GFXCLK].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_GFXCLK].Padding,
pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.a,
pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.b,
pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.c,
pptable->DpmDescriptor[PPCLK_GFXCLK].SsFmin,
pptable->DpmDescriptor[PPCLK_GFXCLK].Padding16);
dev_info(smu->adev->dev, "[PPCLK_SOCCLK]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_SOCCLK].VoltageMode,
pptable->DpmDescriptor[PPCLK_SOCCLK].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_SOCCLK].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_SOCCLK].Padding,
pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.a,
pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.b,
pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.c,
pptable->DpmDescriptor[PPCLK_SOCCLK].SsFmin,
pptable->DpmDescriptor[PPCLK_SOCCLK].Padding16);
dev_info(smu->adev->dev, "[PPCLK_UCLK]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode,
pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_UCLK].Padding,
pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.a,
pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.b,
pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.c,
pptable->DpmDescriptor[PPCLK_UCLK].SsFmin,
pptable->DpmDescriptor[PPCLK_UCLK].Padding16);
dev_info(smu->adev->dev, "[PPCLK_FCLK]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode,
pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_FCLK].Padding,
pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.a,
pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.b,
pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.c,
pptable->DpmDescriptor[PPCLK_FCLK].SsFmin,
pptable->DpmDescriptor[PPCLK_FCLK].Padding16);
dev_info(smu->adev->dev, "[PPCLK_DCLK_0]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_DCLK_0].VoltageMode,
pptable->DpmDescriptor[PPCLK_DCLK_0].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_DCLK_0].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_DCLK_0].Padding,
pptable->DpmDescriptor[PPCLK_DCLK_0].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_DCLK_0].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_DCLK_0].SsCurve.a,
pptable->DpmDescriptor[PPCLK_DCLK_0].SsCurve.b,
pptable->DpmDescriptor[PPCLK_DCLK_0].SsCurve.c,
pptable->DpmDescriptor[PPCLK_DCLK_0].SsFmin,
pptable->DpmDescriptor[PPCLK_DCLK_0].Padding16);
dev_info(smu->adev->dev, "[PPCLK_VCLK_0]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_VCLK_0].VoltageMode,
pptable->DpmDescriptor[PPCLK_VCLK_0].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_VCLK_0].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_VCLK_0].Padding,
pptable->DpmDescriptor[PPCLK_VCLK_0].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_VCLK_0].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_VCLK_0].SsCurve.a,
pptable->DpmDescriptor[PPCLK_VCLK_0].SsCurve.b,
pptable->DpmDescriptor[PPCLK_VCLK_0].SsCurve.c,
pptable->DpmDescriptor[PPCLK_VCLK_0].SsFmin,
pptable->DpmDescriptor[PPCLK_VCLK_0].Padding16);
dev_info(smu->adev->dev, "[PPCLK_DCLK_1]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_DCLK_1].VoltageMode,
pptable->DpmDescriptor[PPCLK_DCLK_1].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_DCLK_1].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_DCLK_1].Padding,
pptable->DpmDescriptor[PPCLK_DCLK_1].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_DCLK_1].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_DCLK_1].SsCurve.a,
pptable->DpmDescriptor[PPCLK_DCLK_1].SsCurve.b,
pptable->DpmDescriptor[PPCLK_DCLK_1].SsCurve.c,
pptable->DpmDescriptor[PPCLK_DCLK_1].SsFmin,
pptable->DpmDescriptor[PPCLK_DCLK_1].Padding16);
dev_info(smu->adev->dev, "[PPCLK_VCLK_1]\n"
" .VoltageMode = 0x%02x\n"
" .SnapToDiscrete = 0x%02x\n"
" .NumDiscreteLevels = 0x%02x\n"
" .padding = 0x%02x\n"
" .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
" .SsCurve {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
" .SsFmin = 0x%04x\n"
" .Padding_16 = 0x%04x\n",
pptable->DpmDescriptor[PPCLK_VCLK_1].VoltageMode,
pptable->DpmDescriptor[PPCLK_VCLK_1].SnapToDiscrete,
pptable->DpmDescriptor[PPCLK_VCLK_1].NumDiscreteLevels,
pptable->DpmDescriptor[PPCLK_VCLK_1].Padding,
pptable->DpmDescriptor[PPCLK_VCLK_1].ConversionToAvfsClk.m,
pptable->DpmDescriptor[PPCLK_VCLK_1].ConversionToAvfsClk.b,
pptable->DpmDescriptor[PPCLK_VCLK_1].SsCurve.a,
pptable->DpmDescriptor[PPCLK_VCLK_1].SsCurve.b,
pptable->DpmDescriptor[PPCLK_VCLK_1].SsCurve.c,
pptable->DpmDescriptor[PPCLK_VCLK_1].SsFmin,
pptable->DpmDescriptor[PPCLK_VCLK_1].Padding16);
dev_info(smu->adev->dev, "FreqTableGfx\n");
for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%02d] = 0x%x\n", i, pptable->FreqTableGfx[i]);
dev_info(smu->adev->dev, "FreqTableVclk\n");
for (i = 0; i < NUM_VCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%02d] = 0x%x\n", i, pptable->FreqTableVclk[i]);
dev_info(smu->adev->dev, "FreqTableDclk\n");
for (i = 0; i < NUM_DCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%02d] = 0x%x\n", i, pptable->FreqTableDclk[i]);
dev_info(smu->adev->dev, "FreqTableSocclk\n");
for (i = 0; i < NUM_SOCCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%02d] = 0x%x\n", i, pptable->FreqTableSocclk[i]);
dev_info(smu->adev->dev, "FreqTableUclk\n");
for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%02d] = 0x%x\n", i, pptable->FreqTableUclk[i]);
dev_info(smu->adev->dev, "FreqTableFclk\n");
for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%02d] = 0x%x\n", i, pptable->FreqTableFclk[i]);
dev_info(smu->adev->dev, "DcModeMaxFreq\n");
dev_info(smu->adev->dev, " .PPCLK_GFXCLK = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_GFXCLK]);
dev_info(smu->adev->dev, " .PPCLK_SOCCLK = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_SOCCLK]);
dev_info(smu->adev->dev, " .PPCLK_UCLK = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_UCLK]);
dev_info(smu->adev->dev, " .PPCLK_FCLK = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_FCLK]);
dev_info(smu->adev->dev, " .PPCLK_DCLK_0 = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_DCLK_0]);
dev_info(smu->adev->dev, " .PPCLK_VCLK_0 = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_VCLK_0]);
dev_info(smu->adev->dev, " .PPCLK_DCLK_1 = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_DCLK_1]);
dev_info(smu->adev->dev, " .PPCLK_VCLK_1 = 0x%x\n", pptable->DcModeMaxFreq[PPCLK_VCLK_1]);
dev_info(smu->adev->dev, "FreqTableUclkDiv\n");
for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->FreqTableUclkDiv[i]);
dev_info(smu->adev->dev, "FclkBoostFreq = 0x%x\n", pptable->FclkBoostFreq);
dev_info(smu->adev->dev, "FclkParamPadding = 0x%x\n", pptable->FclkParamPadding);
dev_info(smu->adev->dev, "Mp0clkFreq\n");
for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->Mp0clkFreq[i]);
dev_info(smu->adev->dev, "Mp0DpmVoltage\n");
for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->Mp0DpmVoltage[i]);
dev_info(smu->adev->dev, "MemVddciVoltage\n");
for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->MemVddciVoltage[i]);
dev_info(smu->adev->dev, "MemMvddVoltage\n");
for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->MemMvddVoltage[i]);
dev_info(smu->adev->dev, "GfxclkFgfxoffEntry = 0x%x\n", pptable->GfxclkFgfxoffEntry);
dev_info(smu->adev->dev, "GfxclkFinit = 0x%x\n", pptable->GfxclkFinit);
dev_info(smu->adev->dev, "GfxclkFidle = 0x%x\n", pptable->GfxclkFidle);
dev_info(smu->adev->dev, "GfxclkSource = 0x%x\n", pptable->GfxclkSource);
dev_info(smu->adev->dev, "GfxclkPadding = 0x%x\n", pptable->GfxclkPadding);
dev_info(smu->adev->dev, "GfxGpoSubFeatureMask = 0x%x\n", pptable->GfxGpoSubFeatureMask);
dev_info(smu->adev->dev, "GfxGpoEnabledWorkPolicyMask = 0x%x\n", pptable->GfxGpoEnabledWorkPolicyMask);
dev_info(smu->adev->dev, "GfxGpoDisabledWorkPolicyMask = 0x%x\n", pptable->GfxGpoDisabledWorkPolicyMask);
dev_info(smu->adev->dev, "GfxGpoPadding[0] = 0x%x\n", pptable->GfxGpoPadding[0]);
dev_info(smu->adev->dev, "GfxGpoVotingAllow = 0x%x\n", pptable->GfxGpoVotingAllow);
dev_info(smu->adev->dev, "GfxGpoPadding32[0] = 0x%x\n", pptable->GfxGpoPadding32[0]);
dev_info(smu->adev->dev, "GfxGpoPadding32[1] = 0x%x\n", pptable->GfxGpoPadding32[1]);
dev_info(smu->adev->dev, "GfxGpoPadding32[2] = 0x%x\n", pptable->GfxGpoPadding32[2]);
dev_info(smu->adev->dev, "GfxGpoPadding32[3] = 0x%x\n", pptable->GfxGpoPadding32[3]);
dev_info(smu->adev->dev, "GfxDcsFopt = 0x%x\n", pptable->GfxDcsFopt);
dev_info(smu->adev->dev, "GfxDcsFclkFopt = 0x%x\n", pptable->GfxDcsFclkFopt);
dev_info(smu->adev->dev, "GfxDcsUclkFopt = 0x%x\n", pptable->GfxDcsUclkFopt);
dev_info(smu->adev->dev, "DcsGfxOffVoltage = 0x%x\n", pptable->DcsGfxOffVoltage);
dev_info(smu->adev->dev, "DcsMinGfxOffTime = 0x%x\n", pptable->DcsMinGfxOffTime);
dev_info(smu->adev->dev, "DcsMaxGfxOffTime = 0x%x\n", pptable->DcsMaxGfxOffTime);
dev_info(smu->adev->dev, "DcsMinCreditAccum = 0x%x\n", pptable->DcsMinCreditAccum);
dev_info(smu->adev->dev, "DcsExitHysteresis = 0x%x\n", pptable->DcsExitHysteresis);
dev_info(smu->adev->dev, "DcsTimeout = 0x%x\n", pptable->DcsTimeout);
dev_info(smu->adev->dev, "DcsParamPadding[0] = 0x%x\n", pptable->DcsParamPadding[0]);
dev_info(smu->adev->dev, "DcsParamPadding[1] = 0x%x\n", pptable->DcsParamPadding[1]);
dev_info(smu->adev->dev, "DcsParamPadding[2] = 0x%x\n", pptable->DcsParamPadding[2]);
dev_info(smu->adev->dev, "DcsParamPadding[3] = 0x%x\n", pptable->DcsParamPadding[3]);
dev_info(smu->adev->dev, "DcsParamPadding[4] = 0x%x\n", pptable->DcsParamPadding[4]);
dev_info(smu->adev->dev, "FlopsPerByteTable\n");
for (i = 0; i < RLC_PACE_TABLE_NUM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->FlopsPerByteTable[i]);
dev_info(smu->adev->dev, "LowestUclkReservedForUlv = 0x%x\n", pptable->LowestUclkReservedForUlv);
dev_info(smu->adev->dev, "vddingMem[0] = 0x%x\n", pptable->PaddingMem[0]);
dev_info(smu->adev->dev, "vddingMem[1] = 0x%x\n", pptable->PaddingMem[1]);
dev_info(smu->adev->dev, "vddingMem[2] = 0x%x\n", pptable->PaddingMem[2]);
dev_info(smu->adev->dev, "UclkDpmPstates\n");
for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->UclkDpmPstates[i]);
dev_info(smu->adev->dev, "UclkDpmSrcFreqRange\n");
dev_info(smu->adev->dev, " .Fmin = 0x%x\n",
pptable->UclkDpmSrcFreqRange.Fmin);
dev_info(smu->adev->dev, " .Fmax = 0x%x\n",
pptable->UclkDpmSrcFreqRange.Fmax);
dev_info(smu->adev->dev, "UclkDpmTargFreqRange\n");
dev_info(smu->adev->dev, " .Fmin = 0x%x\n",
pptable->UclkDpmTargFreqRange.Fmin);
dev_info(smu->adev->dev, " .Fmax = 0x%x\n",
pptable->UclkDpmTargFreqRange.Fmax);
dev_info(smu->adev->dev, "UclkDpmMidstepFreq = 0x%x\n", pptable->UclkDpmMidstepFreq);
dev_info(smu->adev->dev, "UclkMidstepPadding = 0x%x\n", pptable->UclkMidstepPadding);
dev_info(smu->adev->dev, "PcieGenSpeed\n");
for (i = 0; i < NUM_LINK_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->PcieGenSpeed[i]);
dev_info(smu->adev->dev, "PcieLaneCount\n");
for (i = 0; i < NUM_LINK_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->PcieLaneCount[i]);
dev_info(smu->adev->dev, "LclkFreq\n");
for (i = 0; i < NUM_LINK_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->LclkFreq[i]);
dev_info(smu->adev->dev, "FanStopTemp = 0x%x\n", pptable->FanStopTemp);
dev_info(smu->adev->dev, "FanStartTemp = 0x%x\n", pptable->FanStartTemp);
dev_info(smu->adev->dev, "FanGain\n");
for (i = 0; i < TEMP_COUNT; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->FanGain[i]);
dev_info(smu->adev->dev, "FanPwmMin = 0x%x\n", pptable->FanPwmMin);
dev_info(smu->adev->dev, "FanAcousticLimitRpm = 0x%x\n", pptable->FanAcousticLimitRpm);
dev_info(smu->adev->dev, "FanThrottlingRpm = 0x%x\n", pptable->FanThrottlingRpm);
dev_info(smu->adev->dev, "FanMaximumRpm = 0x%x\n", pptable->FanMaximumRpm);
dev_info(smu->adev->dev, "MGpuFanBoostLimitRpm = 0x%x\n", pptable->MGpuFanBoostLimitRpm);
dev_info(smu->adev->dev, "FanTargetTemperature = 0x%x\n", pptable->FanTargetTemperature);
dev_info(smu->adev->dev, "FanTargetGfxclk = 0x%x\n", pptable->FanTargetGfxclk);
dev_info(smu->adev->dev, "FanPadding16 = 0x%x\n", pptable->FanPadding16);
dev_info(smu->adev->dev, "FanTempInputSelect = 0x%x\n", pptable->FanTempInputSelect);
dev_info(smu->adev->dev, "FanPadding = 0x%x\n", pptable->FanPadding);
dev_info(smu->adev->dev, "FanZeroRpmEnable = 0x%x\n", pptable->FanZeroRpmEnable);
dev_info(smu->adev->dev, "FanTachEdgePerRev = 0x%x\n", pptable->FanTachEdgePerRev);
dev_info(smu->adev->dev, "FuzzyFan_ErrorSetDelta = 0x%x\n", pptable->FuzzyFan_ErrorSetDelta);
dev_info(smu->adev->dev, "FuzzyFan_ErrorRateSetDelta = 0x%x\n", pptable->FuzzyFan_ErrorRateSetDelta);
dev_info(smu->adev->dev, "FuzzyFan_PwmSetDelta = 0x%x\n", pptable->FuzzyFan_PwmSetDelta);
dev_info(smu->adev->dev, "FuzzyFan_Reserved = 0x%x\n", pptable->FuzzyFan_Reserved);
dev_info(smu->adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_GFX]);
dev_info(smu->adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]);
dev_info(smu->adev->dev, "dBtcGbGfxDfllModelSelect = 0x%x\n", pptable->dBtcGbGfxDfllModelSelect);
dev_info(smu->adev->dev, "Padding8_Avfs = 0x%x\n", pptable->Padding8_Avfs);
dev_info(smu->adev->dev, "qAvfsGb[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->qAvfsGb[AVFS_VOLTAGE_GFX].a,
pptable->qAvfsGb[AVFS_VOLTAGE_GFX].b,
pptable->qAvfsGb[AVFS_VOLTAGE_GFX].c);
dev_info(smu->adev->dev, "qAvfsGb[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->qAvfsGb[AVFS_VOLTAGE_SOC].a,
pptable->qAvfsGb[AVFS_VOLTAGE_SOC].b,
pptable->qAvfsGb[AVFS_VOLTAGE_SOC].c);
dev_info(smu->adev->dev, "dBtcGbGfxPll{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->dBtcGbGfxPll.a,
pptable->dBtcGbGfxPll.b,
pptable->dBtcGbGfxPll.c);
dev_info(smu->adev->dev, "dBtcGbGfxAfll{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->dBtcGbGfxDfll.a,
pptable->dBtcGbGfxDfll.b,
pptable->dBtcGbGfxDfll.c);
dev_info(smu->adev->dev, "dBtcGbSoc{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->dBtcGbSoc.a,
pptable->dBtcGbSoc.b,
pptable->dBtcGbSoc.c);
dev_info(smu->adev->dev, "qAgingGb[AVFS_VOLTAGE_GFX]{m = 0x%x b = 0x%x}\n",
pptable->qAgingGb[AVFS_VOLTAGE_GFX].m,
pptable->qAgingGb[AVFS_VOLTAGE_GFX].b);
dev_info(smu->adev->dev, "qAgingGb[AVFS_VOLTAGE_SOC]{m = 0x%x b = 0x%x}\n",
pptable->qAgingGb[AVFS_VOLTAGE_SOC].m,
pptable->qAgingGb[AVFS_VOLTAGE_SOC].b);
dev_info(smu->adev->dev, "PiecewiseLinearDroopIntGfxDfll\n");
for (i = 0; i < NUM_PIECE_WISE_LINEAR_DROOP_MODEL_VF_POINTS; i++) {
dev_info(smu->adev->dev, " Fset[%d] = 0x%x\n",
i, pptable->PiecewiseLinearDroopIntGfxDfll.Fset[i]);
dev_info(smu->adev->dev, " Vdroop[%d] = 0x%x\n",
i, pptable->PiecewiseLinearDroopIntGfxDfll.Vdroop[i]);
}
dev_info(smu->adev->dev, "qStaticVoltageOffset[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].a,
pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].b,
pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].c);
dev_info(smu->adev->dev, "qStaticVoltageOffset[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a,
pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b,
pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c);
dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_GFX]);
dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_SOC]);
dev_info(smu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_GFX]);
dev_info(smu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]);
dev_info(smu->adev->dev, "Padding8_GfxBtc[0] = 0x%x\n", pptable->Padding8_GfxBtc[0]);
dev_info(smu->adev->dev, "Padding8_GfxBtc[1] = 0x%x\n", pptable->Padding8_GfxBtc[1]);
dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_GFX]);
dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_SOC]);
dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_GFX]);
dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_SOC]);
dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_GFX]);
dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_SOC]);
dev_info(smu->adev->dev, "XgmiDpmPstates\n");
for (i = 0; i < NUM_XGMI_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->XgmiDpmPstates[i]);
dev_info(smu->adev->dev, "XgmiDpmSpare[0] = 0x%02x\n", pptable->XgmiDpmSpare[0]);
dev_info(smu->adev->dev, "XgmiDpmSpare[1] = 0x%02x\n", pptable->XgmiDpmSpare[1]);
dev_info(smu->adev->dev, "DebugOverrides = 0x%x\n", pptable->DebugOverrides);
dev_info(smu->adev->dev, "ReservedEquation0{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->ReservedEquation0.a,
pptable->ReservedEquation0.b,
pptable->ReservedEquation0.c);
dev_info(smu->adev->dev, "ReservedEquation1{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->ReservedEquation1.a,
pptable->ReservedEquation1.b,
pptable->ReservedEquation1.c);
dev_info(smu->adev->dev, "ReservedEquation2{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->ReservedEquation2.a,
pptable->ReservedEquation2.b,
pptable->ReservedEquation2.c);
dev_info(smu->adev->dev, "ReservedEquation3{a = 0x%x b = 0x%x c = 0x%x}\n",
pptable->ReservedEquation3.a,
pptable->ReservedEquation3.b,
pptable->ReservedEquation3.c);
dev_info(smu->adev->dev, "SkuReserved[0] = 0x%x\n", pptable->SkuReserved[0]);
dev_info(smu->adev->dev, "SkuReserved[1] = 0x%x\n", pptable->SkuReserved[1]);
dev_info(smu->adev->dev, "SkuReserved[2] = 0x%x\n", pptable->SkuReserved[2]);
dev_info(smu->adev->dev, "SkuReserved[3] = 0x%x\n", pptable->SkuReserved[3]);
dev_info(smu->adev->dev, "SkuReserved[4] = 0x%x\n", pptable->SkuReserved[4]);
dev_info(smu->adev->dev, "SkuReserved[5] = 0x%x\n", pptable->SkuReserved[5]);
dev_info(smu->adev->dev, "SkuReserved[6] = 0x%x\n", pptable->SkuReserved[6]);
dev_info(smu->adev->dev, "SkuReserved[7] = 0x%x\n", pptable->SkuReserved[7]);
dev_info(smu->adev->dev, "GamingClk[0] = 0x%x\n", pptable->GamingClk[0]);
dev_info(smu->adev->dev, "GamingClk[1] = 0x%x\n", pptable->GamingClk[1]);
dev_info(smu->adev->dev, "GamingClk[2] = 0x%x\n", pptable->GamingClk[2]);
dev_info(smu->adev->dev, "GamingClk[3] = 0x%x\n", pptable->GamingClk[3]);
dev_info(smu->adev->dev, "GamingClk[4] = 0x%x\n", pptable->GamingClk[4]);
dev_info(smu->adev->dev, "GamingClk[5] = 0x%x\n", pptable->GamingClk[5]);
for (i = 0; i < NUM_I2C_CONTROLLERS; i++) {
dev_info(smu->adev->dev, "I2cControllers[%d]:\n", i);
dev_info(smu->adev->dev, " .Enabled = 0x%x\n",
pptable->I2cControllers[i].Enabled);
dev_info(smu->adev->dev, " .Speed = 0x%x\n",
pptable->I2cControllers[i].Speed);
dev_info(smu->adev->dev, " .SlaveAddress = 0x%x\n",
pptable->I2cControllers[i].SlaveAddress);
dev_info(smu->adev->dev, " .ControllerPort = 0x%x\n",
pptable->I2cControllers[i].ControllerPort);
dev_info(smu->adev->dev, " .ControllerName = 0x%x\n",
pptable->I2cControllers[i].ControllerName);
dev_info(smu->adev->dev, " .ThermalThrottler = 0x%x\n",
pptable->I2cControllers[i].ThermalThrotter);
dev_info(smu->adev->dev, " .I2cProtocol = 0x%x\n",
pptable->I2cControllers[i].I2cProtocol);
dev_info(smu->adev->dev, " .PaddingConfig = 0x%x\n",
pptable->I2cControllers[i].PaddingConfig);
}
dev_info(smu->adev->dev, "GpioScl = 0x%x\n", pptable->GpioScl);
dev_info(smu->adev->dev, "GpioSda = 0x%x\n", pptable->GpioSda);
dev_info(smu->adev->dev, "FchUsbPdSlaveAddr = 0x%x\n", pptable->FchUsbPdSlaveAddr);
dev_info(smu->adev->dev, "I2cSpare[0] = 0x%x\n", pptable->I2cSpare[0]);
dev_info(smu->adev->dev, "Board Parameters:\n");
dev_info(smu->adev->dev, "VddGfxVrMapping = 0x%x\n", pptable->VddGfxVrMapping);
dev_info(smu->adev->dev, "VddSocVrMapping = 0x%x\n", pptable->VddSocVrMapping);
dev_info(smu->adev->dev, "VddMem0VrMapping = 0x%x\n", pptable->VddMem0VrMapping);
dev_info(smu->adev->dev, "VddMem1VrMapping = 0x%x\n", pptable->VddMem1VrMapping);
dev_info(smu->adev->dev, "GfxUlvPhaseSheddingMask = 0x%x\n", pptable->GfxUlvPhaseSheddingMask);
dev_info(smu->adev->dev, "SocUlvPhaseSheddingMask = 0x%x\n", pptable->SocUlvPhaseSheddingMask);
dev_info(smu->adev->dev, "VddciUlvPhaseSheddingMask = 0x%x\n", pptable->VddciUlvPhaseSheddingMask);
dev_info(smu->adev->dev, "MvddUlvPhaseSheddingMask = 0x%x\n", pptable->MvddUlvPhaseSheddingMask);
dev_info(smu->adev->dev, "GfxMaxCurrent = 0x%x\n", pptable->GfxMaxCurrent);
dev_info(smu->adev->dev, "GfxOffset = 0x%x\n", pptable->GfxOffset);
dev_info(smu->adev->dev, "Padding_TelemetryGfx = 0x%x\n", pptable->Padding_TelemetryGfx);
dev_info(smu->adev->dev, "SocMaxCurrent = 0x%x\n", pptable->SocMaxCurrent);
dev_info(smu->adev->dev, "SocOffset = 0x%x\n", pptable->SocOffset);
dev_info(smu->adev->dev, "Padding_TelemetrySoc = 0x%x\n", pptable->Padding_TelemetrySoc);
dev_info(smu->adev->dev, "Mem0MaxCurrent = 0x%x\n", pptable->Mem0MaxCurrent);
dev_info(smu->adev->dev, "Mem0Offset = 0x%x\n", pptable->Mem0Offset);
dev_info(smu->adev->dev, "Padding_TelemetryMem0 = 0x%x\n", pptable->Padding_TelemetryMem0);
dev_info(smu->adev->dev, "Mem1MaxCurrent = 0x%x\n", pptable->Mem1MaxCurrent);
dev_info(smu->adev->dev, "Mem1Offset = 0x%x\n", pptable->Mem1Offset);
dev_info(smu->adev->dev, "Padding_TelemetryMem1 = 0x%x\n", pptable->Padding_TelemetryMem1);
dev_info(smu->adev->dev, "MvddRatio = 0x%x\n", pptable->MvddRatio);
dev_info(smu->adev->dev, "AcDcGpio = 0x%x\n", pptable->AcDcGpio);
dev_info(smu->adev->dev, "AcDcPolarity = 0x%x\n", pptable->AcDcPolarity);
dev_info(smu->adev->dev, "VR0HotGpio = 0x%x\n", pptable->VR0HotGpio);
dev_info(smu->adev->dev, "VR0HotPolarity = 0x%x\n", pptable->VR0HotPolarity);
dev_info(smu->adev->dev, "VR1HotGpio = 0x%x\n", pptable->VR1HotGpio);
dev_info(smu->adev->dev, "VR1HotPolarity = 0x%x\n", pptable->VR1HotPolarity);
dev_info(smu->adev->dev, "GthrGpio = 0x%x\n", pptable->GthrGpio);
dev_info(smu->adev->dev, "GthrPolarity = 0x%x\n", pptable->GthrPolarity);
dev_info(smu->adev->dev, "LedPin0 = 0x%x\n", pptable->LedPin0);
dev_info(smu->adev->dev, "LedPin1 = 0x%x\n", pptable->LedPin1);
dev_info(smu->adev->dev, "LedPin2 = 0x%x\n", pptable->LedPin2);
dev_info(smu->adev->dev, "LedEnableMask = 0x%x\n", pptable->LedEnableMask);
dev_info(smu->adev->dev, "LedPcie = 0x%x\n", pptable->LedPcie);
dev_info(smu->adev->dev, "LedError = 0x%x\n", pptable->LedError);
dev_info(smu->adev->dev, "LedSpare1[0] = 0x%x\n", pptable->LedSpare1[0]);
dev_info(smu->adev->dev, "LedSpare1[1] = 0x%x\n", pptable->LedSpare1[1]);
dev_info(smu->adev->dev, "PllGfxclkSpreadEnabled = 0x%x\n", pptable->PllGfxclkSpreadEnabled);
dev_info(smu->adev->dev, "PllGfxclkSpreadPercent = 0x%x\n", pptable->PllGfxclkSpreadPercent);
dev_info(smu->adev->dev, "PllGfxclkSpreadFreq = 0x%x\n", pptable->PllGfxclkSpreadFreq);
dev_info(smu->adev->dev, "DfllGfxclkSpreadEnabled = 0x%x\n", pptable->DfllGfxclkSpreadEnabled);
dev_info(smu->adev->dev, "DfllGfxclkSpreadPercent = 0x%x\n", pptable->DfllGfxclkSpreadPercent);
dev_info(smu->adev->dev, "DfllGfxclkSpreadFreq = 0x%x\n", pptable->DfllGfxclkSpreadFreq);
dev_info(smu->adev->dev, "UclkSpreadPadding = 0x%x\n", pptable->UclkSpreadPadding);
dev_info(smu->adev->dev, "UclkSpreadFreq = 0x%x\n", pptable->UclkSpreadFreq);
dev_info(smu->adev->dev, "FclkSpreadEnabled = 0x%x\n", pptable->FclkSpreadEnabled);
dev_info(smu->adev->dev, "FclkSpreadPercent = 0x%x\n", pptable->FclkSpreadPercent);
dev_info(smu->adev->dev, "FclkSpreadFreq = 0x%x\n", pptable->FclkSpreadFreq);
dev_info(smu->adev->dev, "MemoryChannelEnabled = 0x%x\n", pptable->MemoryChannelEnabled);
dev_info(smu->adev->dev, "DramBitWidth = 0x%x\n", pptable->DramBitWidth);
dev_info(smu->adev->dev, "PaddingMem1[0] = 0x%x\n", pptable->PaddingMem1[0]);
dev_info(smu->adev->dev, "PaddingMem1[1] = 0x%x\n", pptable->PaddingMem1[1]);
dev_info(smu->adev->dev, "PaddingMem1[2] = 0x%x\n", pptable->PaddingMem1[2]);
dev_info(smu->adev->dev, "TotalBoardPower = 0x%x\n", pptable->TotalBoardPower);
dev_info(smu->adev->dev, "BoardPowerPadding = 0x%x\n", pptable->BoardPowerPadding);
dev_info(smu->adev->dev, "XgmiLinkSpeed\n");
for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->XgmiLinkSpeed[i]);
dev_info(smu->adev->dev, "XgmiLinkWidth\n");
for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->XgmiLinkWidth[i]);
dev_info(smu->adev->dev, "XgmiFclkFreq\n");
for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->XgmiFclkFreq[i]);
dev_info(smu->adev->dev, "XgmiSocVoltage\n");
for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
dev_info(smu->adev->dev, " .[%d] = 0x%x\n", i, pptable->XgmiSocVoltage[i]);
dev_info(smu->adev->dev, "HsrEnabled = 0x%x\n", pptable->HsrEnabled);
dev_info(smu->adev->dev, "VddqOffEnabled = 0x%x\n", pptable->VddqOffEnabled);
dev_info(smu->adev->dev, "PaddingUmcFlags[0] = 0x%x\n", pptable->PaddingUmcFlags[0]);
dev_info(smu->adev->dev, "PaddingUmcFlags[1] = 0x%x\n", pptable->PaddingUmcFlags[1]);
dev_info(smu->adev->dev, "BoardReserved[0] = 0x%x\n", pptable->BoardReserved[0]);
dev_info(smu->adev->dev, "BoardReserved[1] = 0x%x\n", pptable->BoardReserved[1]);
dev_info(smu->adev->dev, "BoardReserved[2] = 0x%x\n", pptable->BoardReserved[2]);
dev_info(smu->adev->dev, "BoardReserved[3] = 0x%x\n", pptable->BoardReserved[3]);
dev_info(smu->adev->dev, "BoardReserved[4] = 0x%x\n", pptable->BoardReserved[4]);
dev_info(smu->adev->dev, "BoardReserved[5] = 0x%x\n", pptable->BoardReserved[5]);
dev_info(smu->adev->dev, "BoardReserved[6] = 0x%x\n", pptable->BoardReserved[6]);
dev_info(smu->adev->dev, "BoardReserved[7] = 0x%x\n", pptable->BoardReserved[7]);
dev_info(smu->adev->dev, "BoardReserved[8] = 0x%x\n", pptable->BoardReserved[8]);
dev_info(smu->adev->dev, "BoardReserved[9] = 0x%x\n", pptable->BoardReserved[9]);
dev_info(smu->adev->dev, "BoardReserved[10] = 0x%x\n", pptable->BoardReserved[10]);
dev_info(smu->adev->dev, "MmHubPadding[0] = 0x%x\n", pptable->MmHubPadding[0]);
dev_info(smu->adev->dev, "MmHubPadding[1] = 0x%x\n", pptable->MmHubPadding[1]);
dev_info(smu->adev->dev, "MmHubPadding[2] = 0x%x\n", pptable->MmHubPadding[2]);
dev_info(smu->adev->dev, "MmHubPadding[3] = 0x%x\n", pptable->MmHubPadding[3]);
dev_info(smu->adev->dev, "MmHubPadding[4] = 0x%x\n", pptable->MmHubPadding[4]);
dev_info(smu->adev->dev, "MmHubPadding[5] = 0x%x\n", pptable->MmHubPadding[5]);
dev_info(smu->adev->dev, "MmHubPadding[6] = 0x%x\n", pptable->MmHubPadding[6]);
dev_info(smu->adev->dev, "MmHubPadding[7] = 0x%x\n", pptable->MmHubPadding[7]);
}