in controllers/omap_ssi_port.c [47:120]
static int ssi_port_regs_show(struct seq_file *m, void *p __maybe_unused)
{
struct hsi_port *port = m->private;
struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
struct hsi_controller *ssi = to_hsi_controller(port->device.parent);
struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
void __iomem *base = omap_ssi->sys;
unsigned int ch;
pm_runtime_get_sync(omap_port->pdev);
if (omap_port->wake_irq > 0)
seq_printf(m, "CAWAKE\t\t: %d\n", ssi_wakein(port));
seq_printf(m, "WAKE\t\t: 0x%08x\n",
readl(base + SSI_WAKE_REG(port->num)));
seq_printf(m, "MPU_ENABLE_IRQ%d\t: 0x%08x\n", 0,
readl(base + SSI_MPU_ENABLE_REG(port->num, 0)));
seq_printf(m, "MPU_STATUS_IRQ%d\t: 0x%08x\n", 0,
readl(base + SSI_MPU_STATUS_REG(port->num, 0)));
/* SST */
base = omap_port->sst_base;
seq_puts(m, "\nSST\n===\n");
seq_printf(m, "ID SST\t\t: 0x%08x\n",
readl(base + SSI_SST_ID_REG));
seq_printf(m, "MODE\t\t: 0x%08x\n",
readl(base + SSI_SST_MODE_REG));
seq_printf(m, "FRAMESIZE\t: 0x%08x\n",
readl(base + SSI_SST_FRAMESIZE_REG));
seq_printf(m, "DIVISOR\t\t: 0x%08x\n",
readl(base + SSI_SST_DIVISOR_REG));
seq_printf(m, "CHANNELS\t: 0x%08x\n",
readl(base + SSI_SST_CHANNELS_REG));
seq_printf(m, "ARBMODE\t\t: 0x%08x\n",
readl(base + SSI_SST_ARBMODE_REG));
seq_printf(m, "TXSTATE\t\t: 0x%08x\n",
readl(base + SSI_SST_TXSTATE_REG));
seq_printf(m, "BUFSTATE\t: 0x%08x\n",
readl(base + SSI_SST_BUFSTATE_REG));
seq_printf(m, "BREAK\t\t: 0x%08x\n",
readl(base + SSI_SST_BREAK_REG));
for (ch = 0; ch < omap_port->channels; ch++) {
seq_printf(m, "BUFFER_CH%d\t: 0x%08x\n", ch,
readl(base + SSI_SST_BUFFER_CH_REG(ch)));
}
/* SSR */
base = omap_port->ssr_base;
seq_puts(m, "\nSSR\n===\n");
seq_printf(m, "ID SSR\t\t: 0x%08x\n",
readl(base + SSI_SSR_ID_REG));
seq_printf(m, "MODE\t\t: 0x%08x\n",
readl(base + SSI_SSR_MODE_REG));
seq_printf(m, "FRAMESIZE\t: 0x%08x\n",
readl(base + SSI_SSR_FRAMESIZE_REG));
seq_printf(m, "CHANNELS\t: 0x%08x\n",
readl(base + SSI_SSR_CHANNELS_REG));
seq_printf(m, "TIMEOUT\t\t: 0x%08x\n",
readl(base + SSI_SSR_TIMEOUT_REG));
seq_printf(m, "RXSTATE\t\t: 0x%08x\n",
readl(base + SSI_SSR_RXSTATE_REG));
seq_printf(m, "BUFSTATE\t: 0x%08x\n",
readl(base + SSI_SSR_BUFSTATE_REG));
seq_printf(m, "BREAK\t\t: 0x%08x\n",
readl(base + SSI_SSR_BREAK_REG));
seq_printf(m, "ERROR\t\t: 0x%08x\n",
readl(base + SSI_SSR_ERROR_REG));
seq_printf(m, "ERRORACK\t: 0x%08x\n",
readl(base + SSI_SSR_ERRORACK_REG));
for (ch = 0; ch < omap_port->channels; ch++) {
seq_printf(m, "BUFFER_CH%d\t: 0x%08x\n", ch,
readl(base + SSI_SSR_BUFFER_CH_REG(ch)));
}
pm_runtime_put_autosuspend(omap_port->pdev);
return 0;
}