in pci/cx88/cx88-tvaudio.c [373:636]
static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
{
static const struct rlist a2_bgdk_common[] = {
{AUD_ERRLOGPERIOD_R, 0x00000064},
{AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
{AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
{AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
{AUD_PDF_DDS_CNST_BYTE2, 0x06},
{AUD_PDF_DDS_CNST_BYTE1, 0x82},
{AUD_PDF_DDS_CNST_BYTE0, 0x12},
{AUD_QAM_MODE, 0x05},
{AUD_PHACC_FREQ_8MSB, 0x34},
{AUD_PHACC_FREQ_8LSB, 0x4c},
{AUD_RATE_ADJ1, 0x00000100},
{AUD_RATE_ADJ2, 0x00000200},
{AUD_RATE_ADJ3, 0x00000300},
{AUD_RATE_ADJ4, 0x00000400},
{AUD_RATE_ADJ5, 0x00000500},
{AUD_THR_FR, 0x00000000},
{AAGC_HYST, 0x0000001a},
{AUD_PILOT_BQD_1_K0, 0x0000755b},
{AUD_PILOT_BQD_1_K1, 0x00551340},
{AUD_PILOT_BQD_1_K2, 0x006d30be},
{AUD_PILOT_BQD_1_K3, 0xffd394af},
{AUD_PILOT_BQD_1_K4, 0x00400000},
{AUD_PILOT_BQD_2_K0, 0x00040000},
{AUD_PILOT_BQD_2_K1, 0x002a4841},
{AUD_PILOT_BQD_2_K2, 0x00400000},
{AUD_PILOT_BQD_2_K3, 0x00000000},
{AUD_PILOT_BQD_2_K4, 0x00000000},
{AUD_MODE_CHG_TIMER, 0x00000040},
{AUD_AFE_12DB_EN, 0x00000001},
{AUD_CORDIC_SHIFT_0, 0x00000007},
{AUD_CORDIC_SHIFT_1, 0x00000007},
{AUD_DEEMPH0_G0, 0x00000380},
{AUD_DEEMPH1_G0, 0x00000380},
{AUD_DCOC_0_SRC, 0x0000001a},
{AUD_DCOC0_SHIFT, 0x00000000},
{AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
{AUD_DCOC_0_SHIFT_IN1, 0x00000008},
{AUD_DCOC_PASS_IN, 0x00000003},
{AUD_IIR3_0_SEL, 0x00000021},
{AUD_DN2_AFC, 0x00000002},
{AUD_DCOC_1_SRC, 0x0000001b},
{AUD_DCOC1_SHIFT, 0x00000000},
{AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
{AUD_DCOC_1_SHIFT_IN1, 0x00000008},
{AUD_IIR3_1_SEL, 0x00000023},
{AUD_RDSI_SEL, 0x00000017},
{AUD_RDSI_SHIFT, 0x00000000},
{AUD_RDSQ_SEL, 0x00000017},
{AUD_RDSQ_SHIFT, 0x00000000},
{AUD_PLL_INT, 0x0000001e},
{AUD_PLL_DDS, 0x00000000},
{AUD_PLL_FRAC, 0x0000e542},
{AUD_POLYPH80SCALEFAC, 0x00000001},
{AUD_START_TIMER, 0x00000000},
{ /* end of list */ },
};
static const struct rlist a2_bg[] = {
{AUD_DMD_RA_DDS, 0x002a4f2f},
{AUD_C1_UP_THR, 0x00007000},
{AUD_C1_LO_THR, 0x00005400},
{AUD_C2_UP_THR, 0x00005400},
{AUD_C2_LO_THR, 0x00003000},
{ /* end of list */ },
};
static const struct rlist a2_dk[] = {
{AUD_DMD_RA_DDS, 0x002a4f2f},
{AUD_C1_UP_THR, 0x00007000},
{AUD_C1_LO_THR, 0x00005400},
{AUD_C2_UP_THR, 0x00005400},
{AUD_C2_LO_THR, 0x00003000},
{AUD_DN0_FREQ, 0x00003a1c},
{AUD_DN2_FREQ, 0x0000d2e0},
{ /* end of list */ },
};
static const struct rlist a1_i[] = {
{AUD_ERRLOGPERIOD_R, 0x00000064},
{AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
{AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
{AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
{AUD_PDF_DDS_CNST_BYTE2, 0x06},
{AUD_PDF_DDS_CNST_BYTE1, 0x82},
{AUD_PDF_DDS_CNST_BYTE0, 0x12},
{AUD_QAM_MODE, 0x05},
{AUD_PHACC_FREQ_8MSB, 0x3a},
{AUD_PHACC_FREQ_8LSB, 0x93},
{AUD_DMD_RA_DDS, 0x002a4f2f},
{AUD_PLL_INT, 0x0000001e},
{AUD_PLL_DDS, 0x00000004},
{AUD_PLL_FRAC, 0x0000e542},
{AUD_RATE_ADJ1, 0x00000100},
{AUD_RATE_ADJ2, 0x00000200},
{AUD_RATE_ADJ3, 0x00000300},
{AUD_RATE_ADJ4, 0x00000400},
{AUD_RATE_ADJ5, 0x00000500},
{AUD_THR_FR, 0x00000000},
{AUD_PILOT_BQD_1_K0, 0x0000755b},
{AUD_PILOT_BQD_1_K1, 0x00551340},
{AUD_PILOT_BQD_1_K2, 0x006d30be},
{AUD_PILOT_BQD_1_K3, 0xffd394af},
{AUD_PILOT_BQD_1_K4, 0x00400000},
{AUD_PILOT_BQD_2_K0, 0x00040000},
{AUD_PILOT_BQD_2_K1, 0x002a4841},
{AUD_PILOT_BQD_2_K2, 0x00400000},
{AUD_PILOT_BQD_2_K3, 0x00000000},
{AUD_PILOT_BQD_2_K4, 0x00000000},
{AUD_MODE_CHG_TIMER, 0x00000060},
{AUD_AFE_12DB_EN, 0x00000001},
{AAGC_HYST, 0x0000000a},
{AUD_CORDIC_SHIFT_0, 0x00000007},
{AUD_CORDIC_SHIFT_1, 0x00000007},
{AUD_C1_UP_THR, 0x00007000},
{AUD_C1_LO_THR, 0x00005400},
{AUD_C2_UP_THR, 0x00005400},
{AUD_C2_LO_THR, 0x00003000},
{AUD_DCOC_0_SRC, 0x0000001a},
{AUD_DCOC0_SHIFT, 0x00000000},
{AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
{AUD_DCOC_0_SHIFT_IN1, 0x00000008},
{AUD_DCOC_PASS_IN, 0x00000003},
{AUD_IIR3_0_SEL, 0x00000021},
{AUD_DN2_AFC, 0x00000002},
{AUD_DCOC_1_SRC, 0x0000001b},
{AUD_DCOC1_SHIFT, 0x00000000},
{AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
{AUD_DCOC_1_SHIFT_IN1, 0x00000008},
{AUD_IIR3_1_SEL, 0x00000023},
{AUD_DN0_FREQ, 0x000035a3},
{AUD_DN2_FREQ, 0x000029c7},
{AUD_CRDC0_SRC_SEL, 0x00000511},
{AUD_IIR1_0_SEL, 0x00000001},
{AUD_IIR1_1_SEL, 0x00000000},
{AUD_IIR3_2_SEL, 0x00000003},
{AUD_IIR3_2_SHIFT, 0x00000000},
{AUD_IIR3_0_SEL, 0x00000002},
{AUD_IIR2_0_SEL, 0x00000021},
{AUD_IIR2_0_SHIFT, 0x00000002},
{AUD_DEEMPH0_SRC_SEL, 0x0000000b},
{AUD_DEEMPH1_SRC_SEL, 0x0000000b},
{AUD_POLYPH80SCALEFAC, 0x00000001},
{AUD_START_TIMER, 0x00000000},
{ /* end of list */ },
};
static const struct rlist am_l[] = {
{AUD_ERRLOGPERIOD_R, 0x00000064},
{AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
{AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
{AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
{AUD_PDF_DDS_CNST_BYTE2, 0x48},
{AUD_PDF_DDS_CNST_BYTE1, 0x3D},
{AUD_QAM_MODE, 0x00},
{AUD_PDF_DDS_CNST_BYTE0, 0xf5},
{AUD_PHACC_FREQ_8MSB, 0x3a},
{AUD_PHACC_FREQ_8LSB, 0x4a},
{AUD_DEEMPHGAIN_R, 0x00006680},
{AUD_DEEMPHNUMER1_R, 0x000353DE},
{AUD_DEEMPHNUMER2_R, 0x000001B1},
{AUD_DEEMPHDENOM1_R, 0x0000F3D0},
{AUD_DEEMPHDENOM2_R, 0x00000000},
{AUD_FM_MODE_ENABLE, 0x00000007},
{AUD_POLYPH80SCALEFAC, 0x00000003},
{AUD_AFE_12DB_EN, 0x00000001},
{AAGC_GAIN, 0x00000000},
{AAGC_HYST, 0x00000018},
{AAGC_DEF, 0x00000020},
{AUD_DN0_FREQ, 0x00000000},
{AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
{AUD_DCOC_0_SRC, 0x00000021},
{AUD_IIR1_0_SEL, 0x00000000},
{AUD_IIR1_0_SHIFT, 0x00000007},
{AUD_IIR1_1_SEL, 0x00000002},
{AUD_IIR1_1_SHIFT, 0x00000000},
{AUD_DCOC_1_SRC, 0x00000003},
{AUD_DCOC1_SHIFT, 0x00000000},
{AUD_DCOC_PASS_IN, 0x00000000},
{AUD_IIR1_2_SEL, 0x00000023},
{AUD_IIR1_2_SHIFT, 0x00000000},
{AUD_IIR1_3_SEL, 0x00000004},
{AUD_IIR1_3_SHIFT, 0x00000007},
{AUD_IIR1_4_SEL, 0x00000005},
{AUD_IIR1_4_SHIFT, 0x00000007},
{AUD_IIR3_0_SEL, 0x00000007},
{AUD_IIR3_0_SHIFT, 0x00000000},
{AUD_DEEMPH0_SRC_SEL, 0x00000011},
{AUD_DEEMPH0_SHIFT, 0x00000000},
{AUD_DEEMPH0_G0, 0x00007000},
{AUD_DEEMPH0_A0, 0x00000000},
{AUD_DEEMPH0_B0, 0x00000000},
{AUD_DEEMPH0_A1, 0x00000000},
{AUD_DEEMPH0_B1, 0x00000000},
{AUD_DEEMPH1_SRC_SEL, 0x00000011},
{AUD_DEEMPH1_SHIFT, 0x00000000},
{AUD_DEEMPH1_G0, 0x00007000},
{AUD_DEEMPH1_A0, 0x00000000},
{AUD_DEEMPH1_B0, 0x00000000},
{AUD_DEEMPH1_A1, 0x00000000},
{AUD_DEEMPH1_B1, 0x00000000},
{AUD_OUT0_SEL, 0x0000003F},
{AUD_OUT1_SEL, 0x0000003F},
{AUD_DMD_RA_DDS, 0x00F5C285},
{AUD_PLL_INT, 0x0000001E},
{AUD_PLL_DDS, 0x00000000},
{AUD_PLL_FRAC, 0x0000E542},
{AUD_RATE_ADJ1, 0x00000100},
{AUD_RATE_ADJ2, 0x00000200},
{AUD_RATE_ADJ3, 0x00000300},
{AUD_RATE_ADJ4, 0x00000400},
{AUD_RATE_ADJ5, 0x00000500},
{AUD_RATE_THRES_DMD, 0x000000C0},
{ /* end of list */ },
};
static const struct rlist a2_deemph50[] = {
{AUD_DEEMPH0_G0, 0x00000380},
{AUD_DEEMPH1_G0, 0x00000380},
{AUD_DEEMPHGAIN_R, 0x000011e1},
{AUD_DEEMPHNUMER1_R, 0x0002a7bc},
{AUD_DEEMPHNUMER2_R, 0x0003023c},
{ /* end of list */ },
};
set_audio_start(core, SEL_A2);
switch (core->tvaudio) {
case WW_BG:
dprintk("%s PAL-BG A1/2 (status: known-good)\n", __func__);
set_audio_registers(core, a2_bgdk_common);
set_audio_registers(core, a2_bg);
set_audio_registers(core, a2_deemph50);
break;
case WW_DK:
dprintk("%s PAL-DK A1/2 (status: known-good)\n", __func__);
set_audio_registers(core, a2_bgdk_common);
set_audio_registers(core, a2_dk);
set_audio_registers(core, a2_deemph50);
break;
case WW_I:
dprintk("%s PAL-I A1 (status: known-good)\n", __func__);
set_audio_registers(core, a1_i);
set_audio_registers(core, a2_deemph50);
break;
case WW_L:
dprintk("%s AM-L (status: devel)\n", __func__);
set_audio_registers(core, am_l);
break;
case WW_NONE:
case WW_BTSC:
case WW_EIAJ:
case WW_I2SPT:
case WW_FM:
case WW_I2SADC:
case WW_M:
dprintk("%s Warning: wrong value\n", __func__);
return;
}
mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
set_audio_finish(core, mode);
}