in pch_phub.c [662:827]
static int pch_phub_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
int ret;
struct pch_phub_reg *chip;
chip = kzalloc(sizeof(struct pch_phub_reg), GFP_KERNEL);
if (chip == NULL)
return -ENOMEM;
ret = pci_enable_device(pdev);
if (ret) {
dev_err(&pdev->dev,
"%s : pci_enable_device FAILED(ret=%d)", __func__, ret);
goto err_pci_enable_dev;
}
dev_dbg(&pdev->dev, "%s : pci_enable_device returns %d\n", __func__,
ret);
ret = pci_request_regions(pdev, KBUILD_MODNAME);
if (ret) {
dev_err(&pdev->dev,
"%s : pci_request_regions FAILED(ret=%d)", __func__, ret);
goto err_req_regions;
}
dev_dbg(&pdev->dev, "%s : "
"pci_request_regions returns %d\n", __func__, ret);
chip->pch_phub_base_address = pci_iomap(pdev, 1, 0);
if (chip->pch_phub_base_address == NULL) {
dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__);
ret = -ENOMEM;
goto err_pci_iomap;
}
dev_dbg(&pdev->dev, "%s : pci_iomap SUCCESS and value "
"in pch_phub_base_address variable is %p\n", __func__,
chip->pch_phub_base_address);
chip->pdev = pdev; /* Save pci device struct */
if (id->driver_data == 1) { /* EG20T PCH */
const char *board_name;
unsigned int prefetch = 0x000affaa;
if (pdev->dev.of_node)
of_property_read_u32(pdev->dev.of_node,
"intel,eg20t-prefetch",
&prefetch);
ret = sysfs_create_file(&pdev->dev.kobj,
&dev_attr_pch_mac.attr);
if (ret)
goto err_sysfs_create;
ret = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
if (ret)
goto exit_bin_attr;
pch_phub_read_modify_write_reg(chip,
(unsigned int)CLKCFG_REG_OFFSET,
CLKCFG_CAN_50MHZ,
CLKCFG_CANCLK_MASK);
/* quirk for CM-iTC board */
board_name = dmi_get_system_info(DMI_BOARD_NAME);
if (board_name && strstr(board_name, "CM-iTC"))
pch_phub_read_modify_write_reg(chip,
(unsigned int)CLKCFG_REG_OFFSET,
CLKCFG_UART_48MHZ | CLKCFG_BAUDDIV |
CLKCFG_PLL2VCO | CLKCFG_UARTCLKSEL,
CLKCFG_UART_MASK);
/* set the prefech value */
iowrite32(prefetch, chip->pch_phub_base_address + 0x14);
/* set the interrupt delay value */
iowrite32(0x25, chip->pch_phub_base_address + 0x44);
chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T;
/* quirk for MIPS Boston platform */
if (pdev->dev.of_node) {
if (of_machine_is_compatible("img,boston")) {
pch_phub_read_modify_write_reg(chip,
(unsigned int)CLKCFG_REG_OFFSET,
CLKCFG_UART_25MHZ,
CLKCFG_UART_MASK);
}
}
} else if (id->driver_data == 2) { /* ML7213 IOH */
ret = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
if (ret)
goto err_sysfs_create;
/* set the prefech value
* Device2(USB OHCI #1/ USB EHCI #1/ USB Device):a
* Device4(SDIO #0,1,2):f
* Device6(SATA 2):f
* Device8(USB OHCI #0/ USB EHCI #0):a
*/
iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14);
chip->pch_opt_rom_start_address =\
PCH_PHUB_ROM_START_ADDR_ML7213;
} else if (id->driver_data == 3) { /* ML7223 IOH Bus-m*/
/* set the prefech value
* Device8(GbE)
*/
iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14);
/* set the interrupt delay value */
iowrite32(0x25, chip->pch_phub_base_address + 0x140);
chip->pch_opt_rom_start_address =\
PCH_PHUB_ROM_START_ADDR_ML7223;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;
} else if (id->driver_data == 4) { /* ML7223 IOH Bus-n*/
ret = sysfs_create_file(&pdev->dev.kobj,
&dev_attr_pch_mac.attr);
if (ret)
goto err_sysfs_create;
ret = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
if (ret)
goto exit_bin_attr;
/* set the prefech value
* Device2(USB OHCI #0,1,2,3/ USB EHCI #0):a
* Device4(SDIO #0,1):f
* Device6(SATA 2):f
*/
iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14);
chip->pch_opt_rom_start_address =\
PCH_PHUB_ROM_START_ADDR_ML7223;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;
} else if (id->driver_data == 5) { /* ML7831 */
ret = sysfs_create_file(&pdev->dev.kobj,
&dev_attr_pch_mac.attr);
if (ret)
goto err_sysfs_create;
ret = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
if (ret)
goto exit_bin_attr;
/* set the prefech value */
iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
/* set the interrupt delay value */
iowrite32(0x25, chip->pch_phub_base_address + 0x44);
chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T;
}
chip->ioh_type = id->driver_data;
pci_set_drvdata(pdev, chip);
return 0;
exit_bin_attr:
sysfs_remove_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr);
err_sysfs_create:
pci_iounmap(pdev, chip->pch_phub_base_address);
err_pci_iomap:
pci_release_regions(pdev);
err_req_regions:
pci_disable_device(pdev);
err_pci_enable_dev:
kfree(chip);
dev_err(&pdev->dev, "%s returns %d\n", __func__, ret);
return ret;
}