in usb/r8152.c [7547:7957]
static void r8156b_hw_phy_cfg(struct r8152 *tp)
{
u32 ocp_data;
u16 data;
switch (tp->version) {
case RTL_VER_12:
ocp_reg_write(tp, 0xbf86, 0x9000);
data = ocp_reg_read(tp, 0xc402);
data |= BIT(10);
ocp_reg_write(tp, 0xc402, data);
data &= ~BIT(10);
ocp_reg_write(tp, 0xc402, data);
ocp_reg_write(tp, 0xbd86, 0x1010);
ocp_reg_write(tp, 0xbd88, 0x1010);
data = ocp_reg_read(tp, 0xbd4e);
data &= ~(BIT(10) | BIT(11));
data |= BIT(11);
ocp_reg_write(tp, 0xbd4e, data);
data = ocp_reg_read(tp, 0xbf46);
data &= ~0xf00;
data |= 0x700;
ocp_reg_write(tp, 0xbf46, data);
break;
case RTL_VER_13:
case RTL_VER_15:
r8156b_wait_loading_flash(tp);
break;
default:
break;
}
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
if (ocp_data & PCUT_STATUS) {
ocp_data &= ~PCUT_STATUS;
ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
}
data = r8153_phy_status(tp, 0);
switch (data) {
case PHY_STAT_EXT_INIT:
rtl8152_apply_firmware(tp, true);
data = ocp_reg_read(tp, 0xa466);
data &= ~BIT(0);
ocp_reg_write(tp, 0xa466, data);
data = ocp_reg_read(tp, 0xa468);
data &= ~(BIT(3) | BIT(1));
ocp_reg_write(tp, 0xa468, data);
break;
case PHY_STAT_LAN_ON:
case PHY_STAT_PWRDN:
default:
rtl8152_apply_firmware(tp, false);
break;
}
data = r8152_mdio_read(tp, MII_BMCR);
if (data & BMCR_PDOWN) {
data &= ~BMCR_PDOWN;
r8152_mdio_write(tp, MII_BMCR, data);
}
/* disable ALDPS before updating the PHY parameters */
r8153_aldps_en(tp, false);
/* disable EEE before updating the PHY parameters */
rtl_eee_enable(tp, false);
data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
WARN_ON_ONCE(data != PHY_STAT_LAN_ON);
ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
ocp_data |= PFM_PWM_SWITCH;
ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
switch (tp->version) {
case RTL_VER_12:
data = ocp_reg_read(tp, 0xbc08);
data |= BIT(3) | BIT(2);
ocp_reg_write(tp, 0xbc08, data);
data = sram_read(tp, 0x8fff);
data &= ~0xff00;
data |= 0x0400;
sram_write(tp, 0x8fff, data);
data = ocp_reg_read(tp, 0xacda);
data |= 0xff00;
ocp_reg_write(tp, 0xacda, data);
data = ocp_reg_read(tp, 0xacde);
data |= 0xf000;
ocp_reg_write(tp, 0xacde, data);
ocp_reg_write(tp, 0xac8c, 0x0ffc);
ocp_reg_write(tp, 0xac46, 0xb7b4);
ocp_reg_write(tp, 0xac50, 0x0fbc);
ocp_reg_write(tp, 0xac3c, 0x9240);
ocp_reg_write(tp, 0xac4e, 0x0db4);
ocp_reg_write(tp, 0xacc6, 0x0707);
ocp_reg_write(tp, 0xacc8, 0xa0d3);
ocp_reg_write(tp, 0xad08, 0x0007);
ocp_reg_write(tp, 0xb87c, 0x8560);
ocp_reg_write(tp, 0xb87e, 0x19cc);
ocp_reg_write(tp, 0xb87c, 0x8562);
ocp_reg_write(tp, 0xb87e, 0x19cc);
ocp_reg_write(tp, 0xb87c, 0x8564);
ocp_reg_write(tp, 0xb87e, 0x19cc);
ocp_reg_write(tp, 0xb87c, 0x8566);
ocp_reg_write(tp, 0xb87e, 0x147d);
ocp_reg_write(tp, 0xb87c, 0x8568);
ocp_reg_write(tp, 0xb87e, 0x147d);
ocp_reg_write(tp, 0xb87c, 0x856a);
ocp_reg_write(tp, 0xb87e, 0x147d);
ocp_reg_write(tp, 0xb87c, 0x8ffe);
ocp_reg_write(tp, 0xb87e, 0x0907);
ocp_reg_write(tp, 0xb87c, 0x80d6);
ocp_reg_write(tp, 0xb87e, 0x2801);
ocp_reg_write(tp, 0xb87c, 0x80f2);
ocp_reg_write(tp, 0xb87e, 0x2801);
ocp_reg_write(tp, 0xb87c, 0x80f4);
ocp_reg_write(tp, 0xb87e, 0x6077);
ocp_reg_write(tp, 0xb506, 0x01e7);
ocp_reg_write(tp, 0xb87c, 0x8013);
ocp_reg_write(tp, 0xb87e, 0x0700);
ocp_reg_write(tp, 0xb87c, 0x8fb9);
ocp_reg_write(tp, 0xb87e, 0x2801);
ocp_reg_write(tp, 0xb87c, 0x8fba);
ocp_reg_write(tp, 0xb87e, 0x0100);
ocp_reg_write(tp, 0xb87c, 0x8fbc);
ocp_reg_write(tp, 0xb87e, 0x1900);
ocp_reg_write(tp, 0xb87c, 0x8fbe);
ocp_reg_write(tp, 0xb87e, 0xe100);
ocp_reg_write(tp, 0xb87c, 0x8fc0);
ocp_reg_write(tp, 0xb87e, 0x0800);
ocp_reg_write(tp, 0xb87c, 0x8fc2);
ocp_reg_write(tp, 0xb87e, 0xe500);
ocp_reg_write(tp, 0xb87c, 0x8fc4);
ocp_reg_write(tp, 0xb87e, 0x0f00);
ocp_reg_write(tp, 0xb87c, 0x8fc6);
ocp_reg_write(tp, 0xb87e, 0xf100);
ocp_reg_write(tp, 0xb87c, 0x8fc8);
ocp_reg_write(tp, 0xb87e, 0x0400);
ocp_reg_write(tp, 0xb87c, 0x8fca);
ocp_reg_write(tp, 0xb87e, 0xf300);
ocp_reg_write(tp, 0xb87c, 0x8fcc);
ocp_reg_write(tp, 0xb87e, 0xfd00);
ocp_reg_write(tp, 0xb87c, 0x8fce);
ocp_reg_write(tp, 0xb87e, 0xff00);
ocp_reg_write(tp, 0xb87c, 0x8fd0);
ocp_reg_write(tp, 0xb87e, 0xfb00);
ocp_reg_write(tp, 0xb87c, 0x8fd2);
ocp_reg_write(tp, 0xb87e, 0x0100);
ocp_reg_write(tp, 0xb87c, 0x8fd4);
ocp_reg_write(tp, 0xb87e, 0xf400);
ocp_reg_write(tp, 0xb87c, 0x8fd6);
ocp_reg_write(tp, 0xb87e, 0xff00);
ocp_reg_write(tp, 0xb87c, 0x8fd8);
ocp_reg_write(tp, 0xb87e, 0xf600);
ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_USB_CFG);
ocp_data |= EN_XG_LIP | EN_G_LIP;
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_USB_CFG, ocp_data);
ocp_reg_write(tp, 0xb87c, 0x813d);
ocp_reg_write(tp, 0xb87e, 0x390e);
ocp_reg_write(tp, 0xb87c, 0x814f);
ocp_reg_write(tp, 0xb87e, 0x790e);
ocp_reg_write(tp, 0xb87c, 0x80b0);
ocp_reg_write(tp, 0xb87e, 0x0f31);
data = ocp_reg_read(tp, 0xbf4c);
data |= BIT(1);
ocp_reg_write(tp, 0xbf4c, data);
data = ocp_reg_read(tp, 0xbcca);
data |= BIT(9) | BIT(8);
ocp_reg_write(tp, 0xbcca, data);
ocp_reg_write(tp, 0xb87c, 0x8141);
ocp_reg_write(tp, 0xb87e, 0x320e);
ocp_reg_write(tp, 0xb87c, 0x8153);
ocp_reg_write(tp, 0xb87e, 0x720e);
ocp_reg_write(tp, 0xb87c, 0x8529);
ocp_reg_write(tp, 0xb87e, 0x050e);
data = ocp_reg_read(tp, OCP_EEE_CFG);
data &= ~CTAP_SHORT_EN;
ocp_reg_write(tp, OCP_EEE_CFG, data);
sram_write(tp, 0x816c, 0xc4a0);
sram_write(tp, 0x8170, 0xc4a0);
sram_write(tp, 0x8174, 0x04a0);
sram_write(tp, 0x8178, 0x04a0);
sram_write(tp, 0x817c, 0x0719);
sram_write(tp, 0x8ff4, 0x0400);
sram_write(tp, 0x8ff1, 0x0404);
ocp_reg_write(tp, 0xbf4a, 0x001b);
ocp_reg_write(tp, 0xb87c, 0x8033);
ocp_reg_write(tp, 0xb87e, 0x7c13);
ocp_reg_write(tp, 0xb87c, 0x8037);
ocp_reg_write(tp, 0xb87e, 0x7c13);
ocp_reg_write(tp, 0xb87c, 0x803b);
ocp_reg_write(tp, 0xb87e, 0xfc32);
ocp_reg_write(tp, 0xb87c, 0x803f);
ocp_reg_write(tp, 0xb87e, 0x7c13);
ocp_reg_write(tp, 0xb87c, 0x8043);
ocp_reg_write(tp, 0xb87e, 0x7c13);
ocp_reg_write(tp, 0xb87c, 0x8047);
ocp_reg_write(tp, 0xb87e, 0x7c13);
ocp_reg_write(tp, 0xb87c, 0x8145);
ocp_reg_write(tp, 0xb87e, 0x370e);
ocp_reg_write(tp, 0xb87c, 0x8157);
ocp_reg_write(tp, 0xb87e, 0x770e);
ocp_reg_write(tp, 0xb87c, 0x8169);
ocp_reg_write(tp, 0xb87e, 0x0d0a);
ocp_reg_write(tp, 0xb87c, 0x817b);
ocp_reg_write(tp, 0xb87e, 0x1d0a);
data = sram_read(tp, 0x8217);
data &= ~0xff00;
data |= 0x5000;
sram_write(tp, 0x8217, data);
data = sram_read(tp, 0x821a);
data &= ~0xff00;
data |= 0x5000;
sram_write(tp, 0x821a, data);
sram_write(tp, 0x80da, 0x0403);
data = sram_read(tp, 0x80dc);
data &= ~0xff00;
data |= 0x1000;
sram_write(tp, 0x80dc, data);
sram_write(tp, 0x80b3, 0x0384);
sram_write(tp, 0x80b7, 0x2007);
data = sram_read(tp, 0x80ba);
data &= ~0xff00;
data |= 0x6c00;
sram_write(tp, 0x80ba, data);
sram_write(tp, 0x80b5, 0xf009);
data = sram_read(tp, 0x80bd);
data &= ~0xff00;
data |= 0x9f00;
sram_write(tp, 0x80bd, data);
sram_write(tp, 0x80c7, 0xf083);
sram_write(tp, 0x80dd, 0x03f0);
data = sram_read(tp, 0x80df);
data &= ~0xff00;
data |= 0x1000;
sram_write(tp, 0x80df, data);
sram_write(tp, 0x80cb, 0x2007);
data = sram_read(tp, 0x80ce);
data &= ~0xff00;
data |= 0x6c00;
sram_write(tp, 0x80ce, data);
sram_write(tp, 0x80c9, 0x8009);
data = sram_read(tp, 0x80d1);
data &= ~0xff00;
data |= 0x8000;
sram_write(tp, 0x80d1, data);
sram_write(tp, 0x80a3, 0x200a);
sram_write(tp, 0x80a5, 0xf0ad);
sram_write(tp, 0x809f, 0x6073);
sram_write(tp, 0x80a1, 0x000b);
data = sram_read(tp, 0x80a9);
data &= ~0xff00;
data |= 0xc000;
sram_write(tp, 0x80a9, data);
if (rtl_phy_patch_request(tp, true, true))
return;
data = ocp_reg_read(tp, 0xb896);
data &= ~BIT(0);
ocp_reg_write(tp, 0xb896, data);
data = ocp_reg_read(tp, 0xb892);
data &= ~0xff00;
ocp_reg_write(tp, 0xb892, data);
ocp_reg_write(tp, 0xb88e, 0xc23e);
ocp_reg_write(tp, 0xb890, 0x0000);
ocp_reg_write(tp, 0xb88e, 0xc240);
ocp_reg_write(tp, 0xb890, 0x0103);
ocp_reg_write(tp, 0xb88e, 0xc242);
ocp_reg_write(tp, 0xb890, 0x0507);
ocp_reg_write(tp, 0xb88e, 0xc244);
ocp_reg_write(tp, 0xb890, 0x090b);
ocp_reg_write(tp, 0xb88e, 0xc246);
ocp_reg_write(tp, 0xb890, 0x0c0e);
ocp_reg_write(tp, 0xb88e, 0xc248);
ocp_reg_write(tp, 0xb890, 0x1012);
ocp_reg_write(tp, 0xb88e, 0xc24a);
ocp_reg_write(tp, 0xb890, 0x1416);
data = ocp_reg_read(tp, 0xb896);
data |= BIT(0);
ocp_reg_write(tp, 0xb896, data);
rtl_phy_patch_request(tp, false, true);
data = ocp_reg_read(tp, 0xa86a);
data |= BIT(0);
ocp_reg_write(tp, 0xa86a, data);
data = ocp_reg_read(tp, 0xa6f0);
data |= BIT(0);
ocp_reg_write(tp, 0xa6f0, data);
ocp_reg_write(tp, 0xbfa0, 0xd70d);
ocp_reg_write(tp, 0xbfa2, 0x4100);
ocp_reg_write(tp, 0xbfa4, 0xe868);
ocp_reg_write(tp, 0xbfa6, 0xdc59);
ocp_reg_write(tp, 0xb54c, 0x3c18);
data = ocp_reg_read(tp, 0xbfa4);
data &= ~BIT(5);
ocp_reg_write(tp, 0xbfa4, data);
data = sram_read(tp, 0x817d);
data |= BIT(12);
sram_write(tp, 0x817d, data);
break;
case RTL_VER_13:
/* 2.5G INRX */
data = ocp_reg_read(tp, 0xac46);
data &= ~0x00f0;
data |= 0x0090;
ocp_reg_write(tp, 0xac46, data);
data = ocp_reg_read(tp, 0xad30);
data &= ~0x0003;
data |= 0x0001;
ocp_reg_write(tp, 0xad30, data);
fallthrough;
case RTL_VER_15:
/* EEE parameter */
ocp_reg_write(tp, 0xb87c, 0x80f5);
ocp_reg_write(tp, 0xb87e, 0x760e);
ocp_reg_write(tp, 0xb87c, 0x8107);
ocp_reg_write(tp, 0xb87e, 0x360e);
ocp_reg_write(tp, 0xb87c, 0x8551);
data = ocp_reg_read(tp, 0xb87e);
data &= ~0xff00;
data |= 0x0800;
ocp_reg_write(tp, 0xb87e, data);
/* ADC_PGA parameter */
data = ocp_reg_read(tp, 0xbf00);
data &= ~0xe000;
data |= 0xa000;
ocp_reg_write(tp, 0xbf00, data);
data = ocp_reg_read(tp, 0xbf46);
data &= ~0x0f00;
data |= 0x0300;
ocp_reg_write(tp, 0xbf46, data);
/* Green Table-PGA, 1G full viterbi */
sram_write(tp, 0x8044, 0x2417);
sram_write(tp, 0x804a, 0x2417);
sram_write(tp, 0x8050, 0x2417);
sram_write(tp, 0x8056, 0x2417);
sram_write(tp, 0x805c, 0x2417);
sram_write(tp, 0x8062, 0x2417);
sram_write(tp, 0x8068, 0x2417);
sram_write(tp, 0x806e, 0x2417);
sram_write(tp, 0x8074, 0x2417);
sram_write(tp, 0x807a, 0x2417);
/* XG PLL */
data = ocp_reg_read(tp, 0xbf84);
data &= ~0xe000;
data |= 0xa000;
ocp_reg_write(tp, 0xbf84, data);
break;
default:
break;
}
if (rtl_phy_patch_request(tp, true, true))
return;
ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4);
ocp_data |= EEE_SPDWN_EN;
ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data);
data = ocp_reg_read(tp, OCP_DOWN_SPEED);
data &= ~(EN_EEE_100 | EN_EEE_1000);
data |= EN_10M_CLKDIV;
ocp_reg_write(tp, OCP_DOWN_SPEED, data);
tp->ups_info._10m_ckdiv = true;
tp->ups_info.eee_plloff_100 = false;
tp->ups_info.eee_plloff_giga = false;
data = ocp_reg_read(tp, OCP_POWER_CFG);
data &= ~EEE_CLKDIV_EN;
ocp_reg_write(tp, OCP_POWER_CFG, data);
tp->ups_info.eee_ckdiv = false;
rtl_phy_patch_request(tp, false, true);
rtl_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags));
data = ocp_reg_read(tp, 0xa428);
data &= ~BIT(9);
ocp_reg_write(tp, 0xa428, data);
data = ocp_reg_read(tp, 0xa5ea);
data &= ~BIT(0);
ocp_reg_write(tp, 0xa5ea, data);
tp->ups_info.lite_mode = 0;
if (tp->eee_en)
rtl_eee_enable(tp, true);
r8153_aldps_en(tp, true);
r8152b_enable_fc(tp);
r8153_u2p3en(tp, true);
set_bit(PHY_RESET, &tp->flags);
}