graph G {
    compound="true"
    rankdir="TB"
    bgcolor="white"
    fontname="Tahoma"

    node [
        fixedsize="false"
        fontname="Tahoma"
        color="white"
        fillcolor="deepskyblue2"
        fontcolor="black"
        shape="box"
        style="filled"
        penwidth="1.0"
    ]
    edge [
        fontname="Arial"
        color="#00688b"
        fontcolor="black"
        fontsize="12"
        arrowsize="0.5"
        penwidth="1.0"
    ]




    "[hisilicon/hisi_uncore_hha_pmu.c]" -- "[hisilicon/hisi_uncore_ddrc_pmu.c]" [label=" 42 ", penwidth="10", color="#00688bFF"];
    "[hisilicon/hisi_uncore_l3c_pmu.c]" -- "[hisilicon/hisi_uncore_hha_pmu.c]" [label=" 42 ", penwidth="10", color="#00688bFF"];
    "[hisilicon/hisi_uncore_l3c_pmu.c]" -- "[hisilicon/hisi_uncore_ddrc_pmu.c]" [label=" 42 ", penwidth="10", color="#00688bFF"];
    "[fsl_imx8_ddr_perf.c]" -- "[arm_smmuv3_pmu.c]" [label=" 39 ", penwidth="9", color="#00688bED"];
    "[arm_smmuv3_pmu.c]" -- "[arm-cmn.c]" [label=" 38 ", penwidth="9", color="#00688bED"];
    "[arm_smmuv3_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 38 ", penwidth="9", color="#00688bED"];
    "[fsl_imx8_ddr_perf.c]" -- "[arm_dmc620_pmu.c]" [label=" 38 ", penwidth="9", color="#00688bED"];
    "[hisilicon/hisi_uncore_l3c_pmu.c]" -- "[fsl_imx8_ddr_perf.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_hha_pmu.c]" -- "[fsl_imx8_ddr_perf.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_l3c_pmu.c]" -- "[arm_smmuv3_pmu.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_l3c_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_ddrc_pmu.c]" -- "[arm_smmuv3_pmu.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_hha_pmu.c]" -- "[arm_smmuv3_pmu.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_ddrc_pmu.c]" -- "[fsl_imx8_ddr_perf.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_ddrc_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_hha_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 37 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 36 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[fsl_imx8_ddr_perf.c]" [label=" 36 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[arm_smmuv3_pmu.c]" [label=" 36 ", penwidth="8", color="#00688bDB"];
    "[fsl_imx8_ddr_perf.c]" -- "[arm-cmn.c]" [label=" 36 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_l3c_pmu.c]" -- "[arm-cmn.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[arm-cmn.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[qcom_l2_pmu.c]" -- "[arm_pmu.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[arm_dmc620_pmu.c]" -- "[arm-cmn.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[hisilicon/hisi_uncore_ddrc_pmu.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[hisilicon/hisi_uncore_hha_pmu.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_ddrc_pmu.c]" -- "[arm-cmn.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_hha_pmu.c]" -- "[arm-cmn.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[hisilicon/hisi_uncore_l3c_pmu.c]" [label=" 35 ", penwidth="8", color="#00688bDB"];
    "[arm_smmuv3_pmu.c]" -- "[arm-cci.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[qcom_l2_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[arm_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[qcom_l3_pmu.c]" -- "[qcom_l2_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[arm_spe_pmu.c]" -- "[arm-cmn.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_ddrc_pmu.c]" -- "[arm_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[arm_spe_pmu.c]" -- "[arm-cci.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_hha_pmu.c]" -- "[arm_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[qcom_l3_pmu.c]" -- "[arm_smmuv3_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[hisilicon/hisi_uncore_l3c_pmu.c]" -- "[arm_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[fsl_imx8_ddr_perf.c]" -- "[arm_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[arm-cci.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[arm_spe_pmu.c]" -- "[arm_smmuv3_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[arm_smmuv3_pmu.c]" -- "[arm_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[qcom_l2_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[qcom_l3_pmu.c]" -- "[fsl_imx8_ddr_perf.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[arm-cmn.c]" -- "[arm-cci.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[fsl_imx8_ddr_perf.c]" -- "[arm-cci.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[xgene_pmu.c]" -- "[qcom_l3_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[qcom_l2_pmu.c]" -- "[arm_smmuv3_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];
    "[qcom_l3_pmu.c]" -- "[arm_dmc620_pmu.c]" [label=" 34 ", penwidth="8", color="#00688bDB"];

}