static irqreturn_t xgene_pmu_isr()

in xgene_pmu.c [1229:1275]

• 42 lines of code
• 6 McCabe index (conditional complexity)

static irqreturn_t xgene_pmu_isr(int irq, void *dev_id)
{
	u32 intr_mcu, intr_mcb, intr_l3c, intr_iob;
	struct xgene_pmu_dev_ctx *ctx;
	struct xgene_pmu *xgene_pmu = dev_id;
	u32 val;

	raw_spin_lock(&xgene_pmu->lock);

	/* Get Interrupt PMU source */
	val = readl(xgene_pmu->pcppmu_csr + PCPPMU_INTSTATUS_REG);
	if (xgene_pmu->version == PCP_PMU_V3) {
		intr_mcu = PCPPMU_V3_INT_MCU;
		intr_mcb = PCPPMU_V3_INT_MCB;
		intr_l3c = PCPPMU_V3_INT_L3C;
		intr_iob = PCPPMU_V3_INT_IOB;
	} else {
		intr_mcu = PCPPMU_INT_MCU;
		intr_mcb = PCPPMU_INT_MCB;
		intr_l3c = PCPPMU_INT_L3C;
		intr_iob = PCPPMU_INT_IOB;
	}
	if (val & intr_mcu) {
		list_for_each_entry(ctx, &xgene_pmu->mcpmus, next) {
			_xgene_pmu_isr(irq, ctx->pmu_dev);
		}
	}
	if (val & intr_mcb) {
		list_for_each_entry(ctx, &xgene_pmu->mcbpmus, next) {
			_xgene_pmu_isr(irq, ctx->pmu_dev);
		}
	}
	if (val & intr_l3c) {
		list_for_each_entry(ctx, &xgene_pmu->l3cpmus, next) {
			_xgene_pmu_isr(irq, ctx->pmu_dev);
		}
	}
	if (val & intr_iob) {
		list_for_each_entry(ctx, &xgene_pmu->iobpmus, next) {
			_xgene_pmu_isr(irq, ctx->pmu_dev);
		}
	}

	raw_spin_unlock(&xgene_pmu->lock);

	return IRQ_HANDLED;
}