static int acpi_pmu_v3_probe_active_mcb_mcu_l3c()

in xgene_pmu.c [1323:1367]

• 36 lines of code
• 9 McCabe index (conditional complexity)

static int acpi_pmu_v3_probe_active_mcb_mcu_l3c(struct xgene_pmu *xgene_pmu,
						struct platform_device *pdev)
{
	void __iomem *csw_csr;
	unsigned int reg;
	u32 mcb0routing;
	u32 mcb1routing;

	csw_csr = devm_platform_ioremap_resource(pdev, 1);
	if (IS_ERR(csw_csr)) {
		dev_err(&pdev->dev, "ioremap failed for CSW CSR resource\n");
		return PTR_ERR(csw_csr);
	}

	reg = readl(csw_csr + CSW_CSWCR);
	mcb0routing = CSW_CSWCR_MCB0_ROUTING(reg);
	mcb1routing = CSW_CSWCR_MCB1_ROUTING(reg);
	if (reg & CSW_CSWCR_DUALMCB_MASK) {
		/* Dual MCB active */
		xgene_pmu->mcb_active_mask = 0x3;
		/* Probe all active L3C(s), maximum is 8 */
		xgene_pmu->l3c_active_mask = 0xFF;
		/* Probe all active MC(s), maximum is 8 */
		if ((mcb0routing == 0x2) && (mcb1routing == 0x2))
			xgene_pmu->mc_active_mask = 0xFF;
		else if ((mcb0routing == 0x1) && (mcb1routing == 0x1))
			xgene_pmu->mc_active_mask =  0x33;
		else
			xgene_pmu->mc_active_mask =  0x11;
	} else {
		/* Single MCB active */
		xgene_pmu->mcb_active_mask = 0x1;
		/* Probe all active L3C(s), maximum is 4 */
		xgene_pmu->l3c_active_mask = 0x0F;
		/* Probe all active MC(s), maximum is 4 */
		if (mcb0routing == 0x2)
			xgene_pmu->mc_active_mask = 0x0F;
		else if (mcb0routing == 0x1)
			xgene_pmu->mc_active_mask =  0x03;
		else
			xgene_pmu->mc_active_mask =  0x01;
	}

	return 0;
}