in ptp_clockmatrix.c [1709:1747]
static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns)
{
struct idtcm *idtcm = channel->idtcm;
int err;
u8 i;
u8 buf[4] = {0};
s32 phase_50ps;
s64 offset_ps;
if (channel->mode != PTP_PLL_MODE_WRITE_PHASE) {
err = channel->configure_write_phase(channel);
if (err)
return err;
}
offset_ps = (s64)delta_ns * 1000;
/*
* Check for 32-bit signed max * 50:
*
* 0x7fffffff * 50 = 2147483647 * 50 = 107374182350
*/
if (offset_ps > MAX_ABS_WRITE_PHASE_PICOSECONDS)
offset_ps = MAX_ABS_WRITE_PHASE_PICOSECONDS;
else if (offset_ps < -MAX_ABS_WRITE_PHASE_PICOSECONDS)
offset_ps = -MAX_ABS_WRITE_PHASE_PICOSECONDS;
phase_50ps = div_s64(offset_ps, 50);
for (i = 0; i < 4; i++) {
buf[i] = phase_50ps & 0xff;
phase_50ps >>= 8;
}
err = idtcm_write(idtcm, channel->dpll_phase, DPLL_WR_PHASE,
buf, sizeof(buf));
return err;
}