static int ep93xx_pwm_apply()

in pwm-ep93xx.c [61:156]

• 71 lines of code
• 16 McCabe index (conditional complexity)

static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
			    const struct pwm_state *state)
{
	int ret;
	struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
	bool enabled = state->enabled;
	void __iomem *base = ep93xx_pwm->base;
	unsigned long long c;
	unsigned long period_cycles;
	unsigned long duty_cycles;
	unsigned long term;

	if (state->polarity != pwm->state.polarity) {
		if (enabled) {
			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
			clk_disable_unprepare(ep93xx_pwm->clk);
			enabled = false;
		}

		/*
		 * The clock needs to be enabled to access the PWM registers.
		 * Polarity can only be changed when the PWM is disabled.
		 */
		ret = clk_prepare_enable(ep93xx_pwm->clk);
		if (ret)
			return ret;

		if (state->polarity == PWM_POLARITY_INVERSED)
			writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT);
		else
			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT);

		clk_disable_unprepare(ep93xx_pwm->clk);
	}

	if (!state->enabled) {
		if (enabled) {
			writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
			clk_disable_unprepare(ep93xx_pwm->clk);
		}

		return 0;
	}

	/*
	 * The clock needs to be enabled to access the PWM registers.
	 * Configuration can be changed at any time.
	 */
	if (!pwm_is_enabled(pwm)) {
		ret = clk_prepare_enable(ep93xx_pwm->clk);
		if (ret)
			return ret;
	}

	c = clk_get_rate(ep93xx_pwm->clk);
	c *= state->period;
	do_div(c, 1000000000);
	period_cycles = c;

	c = period_cycles;
	c *= state->duty_cycle;
	do_div(c, state->period);
	duty_cycles = c;

	if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
		term = readw(base + EP93XX_PWMx_TERM_COUNT);

		/* Order is important if PWM is running */
		if (period_cycles > term) {
			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
			writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
		} else {
			writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
			writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
		}
		ret = 0;
	} else {
		ret = -EINVAL;
	}

	if (!pwm_is_enabled(pwm))
		clk_disable_unprepare(ep93xx_pwm->clk);

	if (ret)
		return ret;

	if (!enabled) {
		ret = clk_prepare_enable(ep93xx_pwm->clk);
		if (ret)
			return ret;

		writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE);
	}

	return 0;
}