static void q6v5_mba_reclaim()

in qcom_q6v5_mss.c [1166:1235]

• 54 lines of code
• 7 McCabe index (conditional complexity)

static void q6v5_mba_reclaim(struct q6v5 *qproc)
{
	int ret;
	u32 val;

	qproc->dump_mba_loaded = false;
	qproc->dp_size = 0;

	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6);
	if (qproc->has_vq6)
		q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_vq6);
	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem);
	q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc);
	if (qproc->version == MSS_MSM8996) {
		/*
		 * To avoid high MX current during LPASS/MSS restart.
		 */
		val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
		val |= Q6SS_CLAMP_IO | QDSP6v56_CLAMP_WL |
			QDSP6v56_CLAMP_QMC_MEM;
		writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
	}

	if (qproc->has_ext_cntl_regs) {
		regmap_write(qproc->conn_map, qproc->rscc_disable, 1);

		ret = regmap_read_poll_timeout(qproc->halt_map, qproc->axim1_clk_off, val,
					       !val, 1, Q6SS_CBCR_TIMEOUT_US);
		if (ret)
			dev_err(qproc->dev, "failed to enable axim1 clock\n");

		ret = regmap_read_poll_timeout(qproc->halt_map, qproc->crypto_clk_off, val,
					       !val, 1, Q6SS_CBCR_TIMEOUT_US);
		if (ret)
			dev_err(qproc->dev, "failed to enable crypto clock\n");
	}

	q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_mdm);
	q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_cx);
	q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi);

	q6v5_reset_assert(qproc);

	q6v5_clk_disable(qproc->dev, qproc->reset_clks,
			 qproc->reset_clk_count);
	q6v5_clk_disable(qproc->dev, qproc->active_clks,
			 qproc->active_clk_count);
	q6v5_regulator_disable(qproc, qproc->active_regs,
			       qproc->active_reg_count);

	/* In case of failure or coredump scenario where reclaiming MBA memory
	 * could not happen reclaim it here.
	 */
	ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false,
				      qproc->mba_phys,
				      qproc->mba_size);
	WARN_ON(ret);

	ret = qcom_q6v5_unprepare(&qproc->q6v5);
	if (ret) {
		q6v5_pds_disable(qproc, qproc->proxy_pds,
				 qproc->proxy_pd_count);
		q6v5_clk_disable(qproc->dev, qproc->proxy_clks,
				 qproc->proxy_clk_count);
		q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs,
				       qproc->fallback_proxy_reg_count);
		q6v5_regulator_disable(qproc, qproc->proxy_regs,
				       qproc->proxy_reg_count);
	}
}