in serial/ucc_uart.c [1252:1472]
static int ucc_uart_probe(struct platform_device *ofdev)
{
struct device_node *np = ofdev->dev.of_node;
const char *sprop; /* String OF properties */
struct uart_qe_port *qe_port = NULL;
struct resource res;
u32 val;
int ret;
/*
* Determine if we need Soft-UART mode
*/
ret = soft_uart_init(ofdev);
if (ret)
return ret;
qe_port = kzalloc(sizeof(struct uart_qe_port), GFP_KERNEL);
if (!qe_port) {
dev_err(&ofdev->dev, "can't allocate QE port structure\n");
return -ENOMEM;
}
/* Search for IRQ and mapbase */
ret = of_address_to_resource(np, 0, &res);
if (ret) {
dev_err(&ofdev->dev, "missing 'reg' property in device tree\n");
goto out_free;
}
if (!res.start) {
dev_err(&ofdev->dev, "invalid 'reg' property in device tree\n");
ret = -EINVAL;
goto out_free;
}
qe_port->port.mapbase = res.start;
/* Get the UCC number (device ID) */
/* UCCs are numbered 1-7 */
if (of_property_read_u32(np, "cell-index", &val)) {
if (of_property_read_u32(np, "device-id", &val)) {
dev_err(&ofdev->dev, "UCC is unspecified in device tree\n");
ret = -EINVAL;
goto out_free;
}
}
if (val < 1 || val > UCC_MAX_NUM) {
dev_err(&ofdev->dev, "no support for UCC%u\n", val);
ret = -ENODEV;
goto out_free;
}
qe_port->ucc_num = val - 1;
/*
* In the future, we should not require the BRG to be specified in the
* device tree. If no clock-source is specified, then just pick a BRG
* to use. This requires a new QE library function that manages BRG
* assignments.
*/
sprop = of_get_property(np, "rx-clock-name", NULL);
if (!sprop) {
dev_err(&ofdev->dev, "missing rx-clock-name in device tree\n");
ret = -ENODEV;
goto out_free;
}
qe_port->us_info.rx_clock = qe_clock_source(sprop);
if ((qe_port->us_info.rx_clock < QE_BRG1) ||
(qe_port->us_info.rx_clock > QE_BRG16)) {
dev_err(&ofdev->dev, "rx-clock-name must be a BRG for UART\n");
ret = -ENODEV;
goto out_free;
}
#ifdef LOOPBACK
/* In internal loopback mode, TX and RX must use the same clock */
qe_port->us_info.tx_clock = qe_port->us_info.rx_clock;
#else
sprop = of_get_property(np, "tx-clock-name", NULL);
if (!sprop) {
dev_err(&ofdev->dev, "missing tx-clock-name in device tree\n");
ret = -ENODEV;
goto out_free;
}
qe_port->us_info.tx_clock = qe_clock_source(sprop);
#endif
if ((qe_port->us_info.tx_clock < QE_BRG1) ||
(qe_port->us_info.tx_clock > QE_BRG16)) {
dev_err(&ofdev->dev, "tx-clock-name must be a BRG for UART\n");
ret = -ENODEV;
goto out_free;
}
/* Get the port number, numbered 0-3 */
if (of_property_read_u32(np, "port-number", &val)) {
dev_err(&ofdev->dev, "missing port-number in device tree\n");
ret = -EINVAL;
goto out_free;
}
qe_port->port.line = val;
if (qe_port->port.line >= UCC_MAX_UART) {
dev_err(&ofdev->dev, "port-number must be 0-%u\n",
UCC_MAX_UART - 1);
ret = -EINVAL;
goto out_free;
}
qe_port->port.irq = irq_of_parse_and_map(np, 0);
if (qe_port->port.irq == 0) {
dev_err(&ofdev->dev, "could not map IRQ for UCC%u\n",
qe_port->ucc_num + 1);
ret = -EINVAL;
goto out_free;
}
/*
* Newer device trees have an "fsl,qe" compatible property for the QE
* node, but we still need to support older device trees.
*/
np = of_find_compatible_node(NULL, NULL, "fsl,qe");
if (!np) {
np = of_find_node_by_type(NULL, "qe");
if (!np) {
dev_err(&ofdev->dev, "could not find 'qe' node\n");
ret = -EINVAL;
goto out_free;
}
}
if (of_property_read_u32(np, "brg-frequency", &val)) {
dev_err(&ofdev->dev,
"missing brg-frequency in device tree\n");
ret = -EINVAL;
goto out_np;
}
if (val)
qe_port->port.uartclk = val;
else {
if (!IS_ENABLED(CONFIG_PPC32)) {
dev_err(&ofdev->dev,
"invalid brg-frequency in device tree\n");
ret = -EINVAL;
goto out_np;
}
/*
* Older versions of U-Boot do not initialize the brg-frequency
* property, so in this case we assume the BRG frequency is
* half the QE bus frequency.
*/
if (of_property_read_u32(np, "bus-frequency", &val)) {
dev_err(&ofdev->dev,
"missing QE bus-frequency in device tree\n");
ret = -EINVAL;
goto out_np;
}
if (val)
qe_port->port.uartclk = val / 2;
else {
dev_err(&ofdev->dev,
"invalid QE bus-frequency in device tree\n");
ret = -EINVAL;
goto out_np;
}
}
spin_lock_init(&qe_port->port.lock);
qe_port->np = np;
qe_port->port.dev = &ofdev->dev;
qe_port->port.ops = &qe_uart_pops;
qe_port->port.iotype = UPIO_MEM;
qe_port->tx_nrfifos = TX_NUM_FIFO;
qe_port->tx_fifosize = TX_BUF_SIZE;
qe_port->rx_nrfifos = RX_NUM_FIFO;
qe_port->rx_fifosize = RX_BUF_SIZE;
qe_port->wait_closing = UCC_WAIT_CLOSING;
qe_port->port.fifosize = 512;
qe_port->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
qe_port->us_info.ucc_num = qe_port->ucc_num;
qe_port->us_info.regs = (phys_addr_t) res.start;
qe_port->us_info.irq = qe_port->port.irq;
qe_port->us_info.rx_bd_ring_len = qe_port->rx_nrfifos;
qe_port->us_info.tx_bd_ring_len = qe_port->tx_nrfifos;
/* Make sure ucc_slow_init() initializes both TX and RX */
qe_port->us_info.init_tx = 1;
qe_port->us_info.init_rx = 1;
/* Add the port to the uart sub-system. This will cause
* qe_uart_config_port() to be called, so the us_info structure must
* be initialized.
*/
ret = uart_add_one_port(&ucc_uart_driver, &qe_port->port);
if (ret) {
dev_err(&ofdev->dev, "could not add /dev/ttyQE%u\n",
qe_port->port.line);
goto out_np;
}
platform_set_drvdata(ofdev, qe_port);
dev_info(&ofdev->dev, "UCC%u assigned to /dev/ttyQE%u\n",
qe_port->ucc_num + 1, qe_port->port.line);
/* Display the mknod command for this device */
dev_dbg(&ofdev->dev, "mknod command is 'mknod /dev/ttyQE%u c %u %u'\n",
qe_port->port.line, SERIAL_QE_MAJOR,
SERIAL_QE_MINOR + qe_port->port.line);
return 0;
out_np:
of_node_put(np);
out_free:
kfree(qe_port);
return ret;
}