devicetree/bindings/power/mediatek,power-controller.yaml [67:147]:
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        maxItems: 1

      clocks:
        description: |
          A number of phandles to clocks that need to be enabled during domain
          power-up sequencing.

      clock-names:
        description: |
          List of names of clocks, in order to match the power-up sequencing
          for each power domain we need to group the clocks by name. BASIC
          clocks need to be enabled before enabling the corresponding power
          domain, and should not have a '-' in their name (i.e mm, mfg, venc).
          SUSBYS clocks need to be enabled before releasing the bus protection,
          and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).

          In order to follow properly the power-up sequencing, the clocks must
          be specified by order, adding first the BASIC clocks followed by the
          SUSBSYS clocks.

      domain-supply:
        description: domain regulator supply.

      mediatek,infracfg:
        $ref: /schemas/types.yaml#/definitions/phandle
        description: phandle to the device containing the INFRACFG register range.

      mediatek,smi:
        $ref: /schemas/types.yaml#/definitions/phandle
        description: phandle to the device containing the SMI register range.

    patternProperties:
      "^power-domain@[0-9a-f]+$":
        type: object
        description: |
          Represents a power domain child within a power domain parent node.

        properties:

          '#power-domain-cells':
            description:
              Must be 0 for nodes representing a single PM domain and 1 for nodes
              providing multiple PM domains.

          '#address-cells':
            const: 1

          '#size-cells':
            const: 0

          reg:
            maxItems: 1

          clocks:
            description: |
              A number of phandles to clocks that need to be enabled during domain
              power-up sequencing.

          clock-names:
            description: |
              List of names of clocks, in order to match the power-up sequencing
              for each power domain we need to group the clocks by name. BASIC
              clocks need to be enabled before enabling the corresponding power
              domain, and should not have a '-' in their name (i.e mm, mfg, venc).
              SUSBYS clocks need to be enabled before releasing the bus protection,
              and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).

              In order to follow properly the power-up sequencing, the clocks must
              be specified by order, adding first the BASIC clocks followed by the
              SUSBSYS clocks.

          domain-supply:
            description: domain regulator supply.

          mediatek,infracfg:
            $ref: /schemas/types.yaml#/definitions/phandle
            description: phandle to the device containing the INFRACFG register range.

          mediatek,smi:
            $ref: /schemas/types.yaml#/definitions/phandle
            description: phandle to the device containing the SMI register range.
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devicetree/bindings/power/mediatek,power-controller.yaml [118:198]:
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            maxItems: 1

          clocks:
            description: |
              A number of phandles to clocks that need to be enabled during domain
              power-up sequencing.

          clock-names:
            description: |
              List of names of clocks, in order to match the power-up sequencing
              for each power domain we need to group the clocks by name. BASIC
              clocks need to be enabled before enabling the corresponding power
              domain, and should not have a '-' in their name (i.e mm, mfg, venc).
              SUSBYS clocks need to be enabled before releasing the bus protection,
              and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).

              In order to follow properly the power-up sequencing, the clocks must
              be specified by order, adding first the BASIC clocks followed by the
              SUSBSYS clocks.

          domain-supply:
            description: domain regulator supply.

          mediatek,infracfg:
            $ref: /schemas/types.yaml#/definitions/phandle
            description: phandle to the device containing the INFRACFG register range.

          mediatek,smi:
            $ref: /schemas/types.yaml#/definitions/phandle
            description: phandle to the device containing the SMI register range.

        patternProperties:
          "^power-domain@[0-9a-f]+$":
            type: object
            description: |
              Represents a power domain child within a power domain parent node.

            properties:

              '#power-domain-cells':
                description:
                  Must be 0 for nodes representing a single PM domain and 1 for nodes
                  providing multiple PM domains.

              '#address-cells':
                const: 1

              '#size-cells':
                const: 0

              reg:
                maxItems: 1

              clocks:
                description: |
                  A number of phandles to clocks that need to be enabled during domain
                  power-up sequencing.

              clock-names:
                description: |
                  List of names of clocks, in order to match the power-up sequencing
                  for each power domain we need to group the clocks by name. BASIC
                  clocks need to be enabled before enabling the corresponding power
                  domain, and should not have a '-' in their name (i.e mm, mfg, venc).
                  SUSBYS clocks need to be enabled before releasing the bus protection,
                  and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).

                  In order to follow properly the power-up sequencing, the clocks must
                  be specified by order, adding first the BASIC clocks followed by the
                  SUSBSYS clocks.

              domain-supply:
                description: domain regulator supply.

              mediatek,infracfg:
                $ref: /schemas/types.yaml#/definitions/phandle
                description: phandle to the device containing the INFRACFG register range.

              mediatek,smi:
                $ref: /schemas/types.yaml#/definitions/phandle
                description: phandle to the device containing the SMI register range.
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