in disas/riscv.c [2379:2657]
static void decode_inst_operands(rv_decode *dec)
{
rv_inst inst = dec->inst;
dec->codec = opcode_data[dec->op].codec;
switch (dec->codec) {
case rv_codec_none:
dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
dec->imm = 0;
break;
case rv_codec_u:
dec->rd = operand_rd(inst);
dec->rs1 = dec->rs2 = rv_ireg_zero;
dec->imm = operand_imm20(inst);
break;
case rv_codec_uj:
dec->rd = operand_rd(inst);
dec->rs1 = dec->rs2 = rv_ireg_zero;
dec->imm = operand_jimm20(inst);
break;
case rv_codec_i:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_imm12(inst);
break;
case rv_codec_i_sh5:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_shamt5(inst);
break;
case rv_codec_i_sh6:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_shamt6(inst);
break;
case rv_codec_i_sh7:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_shamt7(inst);
break;
case rv_codec_i_csr:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_csr12(inst);
break;
case rv_codec_s:
dec->rd = rv_ireg_zero;
dec->rs1 = operand_rs1(inst);
dec->rs2 = operand_rs2(inst);
dec->imm = operand_simm12(inst);
break;
case rv_codec_sb:
dec->rd = rv_ireg_zero;
dec->rs1 = operand_rs1(inst);
dec->rs2 = operand_rs2(inst);
dec->imm = operand_sbimm12(inst);
break;
case rv_codec_r:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = operand_rs2(inst);
dec->imm = 0;
break;
case rv_codec_r_m:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = operand_rs2(inst);
dec->imm = 0;
dec->rm = operand_rm(inst);
break;
case rv_codec_r4_m:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = operand_rs2(inst);
dec->rs3 = operand_rs3(inst);
dec->imm = 0;
dec->rm = operand_rm(inst);
break;
case rv_codec_r_a:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = operand_rs2(inst);
dec->imm = 0;
dec->aq = operand_aq(inst);
dec->rl = operand_rl(inst);
break;
case rv_codec_r_l:
dec->rd = operand_rd(inst);
dec->rs1 = operand_rs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = 0;
dec->aq = operand_aq(inst);
dec->rl = operand_rl(inst);
break;
case rv_codec_r_f:
dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
dec->pred = operand_pred(inst);
dec->succ = operand_succ(inst);
dec->imm = 0;
break;
case rv_codec_cb:
dec->rd = rv_ireg_zero;
dec->rs1 = operand_crs1q(inst) + 8;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmb(inst);
break;
case rv_codec_cb_imm:
dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmi(inst);
break;
case rv_codec_cb_sh5:
dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmsh5(inst);
break;
case rv_codec_cb_sh6:
dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmsh6(inst);
break;
case rv_codec_ci:
dec->rd = dec->rs1 = operand_crs1rd(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmi(inst);
break;
case rv_codec_ci_sh5:
dec->rd = dec->rs1 = operand_crs1rd(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmsh5(inst);
break;
case rv_codec_ci_sh6:
dec->rd = dec->rs1 = operand_crs1rd(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmsh6(inst);
break;
case rv_codec_ci_16sp:
dec->rd = rv_ireg_sp;
dec->rs1 = rv_ireg_sp;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimm16sp(inst);
break;
case rv_codec_ci_lwsp:
dec->rd = operand_crd(inst);
dec->rs1 = rv_ireg_sp;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmlwsp(inst);
break;
case rv_codec_ci_ldsp:
dec->rd = operand_crd(inst);
dec->rs1 = rv_ireg_sp;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmldsp(inst);
break;
case rv_codec_ci_lqsp:
dec->rd = operand_crd(inst);
dec->rs1 = rv_ireg_sp;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmlqsp(inst);
break;
case rv_codec_ci_li:
dec->rd = operand_crd(inst);
dec->rs1 = rv_ireg_zero;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmi(inst);
break;
case rv_codec_ci_lui:
dec->rd = operand_crd(inst);
dec->rs1 = rv_ireg_zero;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmui(inst);
break;
case rv_codec_ci_none:
dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
dec->imm = 0;
break;
case rv_codec_ciw_4spn:
dec->rd = operand_crdq(inst) + 8;
dec->rs1 = rv_ireg_sp;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimm4spn(inst);
break;
case rv_codec_cj:
dec->rd = dec->rs1 = dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmj(inst);
break;
case rv_codec_cj_jal:
dec->rd = rv_ireg_ra;
dec->rs1 = dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmj(inst);
break;
case rv_codec_cl_lw:
dec->rd = operand_crdq(inst) + 8;
dec->rs1 = operand_crs1q(inst) + 8;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmw(inst);
break;
case rv_codec_cl_ld:
dec->rd = operand_crdq(inst) + 8;
dec->rs1 = operand_crs1q(inst) + 8;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmd(inst);
break;
case rv_codec_cl_lq:
dec->rd = operand_crdq(inst) + 8;
dec->rs1 = operand_crs1q(inst) + 8;
dec->rs2 = rv_ireg_zero;
dec->imm = operand_cimmq(inst);
break;
case rv_codec_cr:
dec->rd = dec->rs1 = operand_crs1rd(inst);
dec->rs2 = operand_crs2(inst);
dec->imm = 0;
break;
case rv_codec_cr_mv:
dec->rd = operand_crd(inst);
dec->rs1 = operand_crs2(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = 0;
break;
case rv_codec_cr_jalr:
dec->rd = rv_ireg_ra;
dec->rs1 = operand_crs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = 0;
break;
case rv_codec_cr_jr:
dec->rd = rv_ireg_zero;
dec->rs1 = operand_crs1(inst);
dec->rs2 = rv_ireg_zero;
dec->imm = 0;
break;
case rv_codec_cs:
dec->rd = dec->rs1 = operand_crs1rdq(inst) + 8;
dec->rs2 = operand_crs2q(inst) + 8;
dec->imm = 0;
break;
case rv_codec_cs_sw:
dec->rd = rv_ireg_zero;
dec->rs1 = operand_crs1q(inst) + 8;
dec->rs2 = operand_crs2q(inst) + 8;
dec->imm = operand_cimmw(inst);
break;
case rv_codec_cs_sd:
dec->rd = rv_ireg_zero;
dec->rs1 = operand_crs1q(inst) + 8;
dec->rs2 = operand_crs2q(inst) + 8;
dec->imm = operand_cimmd(inst);
break;
case rv_codec_cs_sq:
dec->rd = rv_ireg_zero;
dec->rs1 = operand_crs1q(inst) + 8;
dec->rs2 = operand_crs2q(inst) + 8;
dec->imm = operand_cimmq(inst);
break;
case rv_codec_css_swsp:
dec->rd = rv_ireg_zero;
dec->rs1 = rv_ireg_sp;
dec->rs2 = operand_crs2(inst);
dec->imm = operand_cimmswsp(inst);
break;
case rv_codec_css_sdsp:
dec->rd = rv_ireg_zero;
dec->rs1 = rv_ireg_sp;
dec->rs2 = operand_crs2(inst);
dec->imm = operand_cimmsdsp(inst);
break;
case rv_codec_css_sqsp:
dec->rd = rv_ireg_zero;
dec->rs1 = rv_ireg_sp;
dec->rs2 = operand_crs2(inst);
dec->imm = operand_cimmsqsp(inst);
break;
};
}