in common/recipes-lib/obmc-pal/files/obmc-pal.c [345:554]
int __attribute__((weak))
pal_parse_oem_unified_sel_common(uint8_t fru, uint8_t *sel, char *error_log)
{
char *mem_err[] = {
"Memory training failure",
"Memory correctable error",
"Memory uncorrectable error",
"Memory correctable error (Patrol scrub)",
"Memory uncorrectable error (Patrol scrub)",
"Memory Parity Error event",
"Reserved"
};
char *upi_err[] = {
"UPI Init error",
"Reserved"
};
char *post_err[] = {
"System PXE boot fail",
"CMOS/NVRAM configuration cleared",
"TPM Self-Test Fail",
"Reserved"
};
char *pcie_event[] = {
"PCIe DPC Event",
"PCIe LER Event",
"PCIe Link Retraining and Recovery",
"PCIe Link CRC Error Check and Retry",
"PCIe Corrupt Data Containment",
"PCIe Express ECRC",
"Reserved"
};
char *mem_event[] = {
"Memory PPR event",
"Memory Correctable Error logging limit reached",
"Memory disable/map-out for FRB",
"Memory SDDC",
"Memory Address range/Partial mirroring",
"Memory ADDDC",
"Memory SMBus hang recovery",
"No DIMM in System",
"Reserved"
};
char *upi_event[] = {
"Successful LLR without Phy Reinit",
"Successful LLR with Phy Reinit",
"COR Phy Lane failure, recovery in x8 width",
"Reserved"
};
uint8_t general_info = sel[3];
uint8_t error_type = general_info & 0xF;
uint8_t plat, event_type, estr_idx;
_dimm_info dimm_info = {
(sel[8]>>4) & 0x03, // Sled
sel[8] & 0x0F, // Socket
sel[9], // Channel
sel[10] // Slot
};
char dimm_str[8] = {0};
char dimm_location_str[128] = {0};
char temp_log[128] = {0};
error_log[0] = '\0';
switch (error_type) {
case UNIFIED_PCIE_ERR:
plat = (general_info & 0x10) >> 4;
if (plat == 0) { //x86
sprintf(error_log, "GeneralInfo: x86/PCIeErr(0x%02X), Bus %02X/Dev %02X/Fun %02X, TotalErrID1Cnt: 0x%04X, ErrID2: 0x%02X, ErrID1: 0x%02X",
general_info, sel[11], sel[10]>>3, sel[10]&0x7, ((sel[13]<<8)|sel[12]), sel[14], sel[15]);
} else {
sprintf(error_log, "GeneralInfo: ARM/PCIeErr(0x%02X), Aux. Info: 0x%04X, Bus %02X/Dev %02X/Fun %02X, TotalErrID1Cnt: 0x%04X, ErrID2: 0x%02X, ErrID1: 0x%02X",
general_info, ((sel[9]<<8)|sel[8]), sel[11], sel[10]>>3,
sel[10]&0x7, ((sel[13]<<8)|sel[12]),sel[14], sel[15]);
}
sprintf(temp_log, "B %02X D %02X F %02X PCIe err,FRU:%u", sel[11], sel[10]>>3, sel[10]&0x7, fru);
pal_add_cri_sel(temp_log);
break;
case UNIFIED_MEM_ERR:
// get dimm location data string.
get_common_dimm_location_str(dimm_info, dimm_location_str, dimm_str);
plat = (sel[12] & 0x80) >> 7;
event_type = sel[12] & 0xF;
switch (event_type) {
case MEMORY_TRAINING_ERR:
if (plat == 0) { //Intel
sprintf(error_log, "GeneralInfo: MEMORY_ECC_ERR(0x%02X), %s, DIMM Failure Event: %s, Major Code: 0x%02X, Minor Code: 0x%02X",
general_info, dimm_location_str,
mem_err[event_type], sel[13], sel[14]);
} else { //AMD
sprintf(error_log, "GeneralInfo: MEMORY_ECC_ERR(0x%02X), %s, DIMM Failure Event: %s, Major Code: 0x%02X, Minor Code: 0x%04X",
general_info, dimm_location_str,
mem_err[event_type], sel[13], (sel[15]<<8)|sel[14]);
}
sprintf(temp_log, "DIMM %s initialization fails", dimm_str);
pal_add_cri_sel(temp_log);
break;
default:
pal_convert_to_dimm_str(dimm_info.socket, dimm_info.channel, dimm_info.slot, dimm_str);
estr_idx = (event_type < ARRAY_SIZE(mem_err)) ? event_type : (ARRAY_SIZE(mem_err) - 1);
sprintf(error_log, "GeneralInfo: MEMORY_ECC_ERR(0x%02X), %s, DIMM Failure Event: %s",
general_info, dimm_location_str, mem_err[estr_idx]);
if ((event_type == MEMORY_CORRECTABLE_ERR) || (event_type == MEMORY_CORR_ERR_PTRL_SCR)) {
sprintf(temp_log, "DIMM%s ECC err,FRU:%u", dimm_str, fru);
pal_add_cri_sel(temp_log);
} else if ((event_type == MEMORY_UNCORRECTABLE_ERR) || (event_type == MEMORY_UNCORR_ERR_PTRL_SCR)) {
sprintf(temp_log, "DIMM%s UECC err,FRU:%u", dimm_str, fru);
pal_add_cri_sel(temp_log);
}
break;
}
break;
case UNIFIED_UPI_ERR:
event_type = sel[12] & 0xF;
estr_idx = (event_type < ARRAY_SIZE(upi_err)) ? event_type : (ARRAY_SIZE(upi_err) - 1);
switch (event_type) {
case UPI_INIT_ERR:
sprintf(error_log, "GeneralInfo: UPIErr(0x%02X), UPI Port Location: Sled %02d/Socket %02d, Port %02d, UPI Failure Event: %s, Major Code: 0x%02X, Minor Code: 0x%02X",
general_info, dimm_info.sled, dimm_info.socket, sel[9]&0xF, upi_err[estr_idx], sel[13], sel[14]);
break;
default:
sprintf(error_log, "GeneralInfo: UPIErr(0x%02X), UPI Port Location: Sled %02d/Socket %02d, Port %02d, UPI Failure Event: %s",
general_info, dimm_info.sled, dimm_info.socket, sel[9]&0xF, upi_err[estr_idx]);
break;
}
break;
case UNIFIED_IIO_ERR:
{
uint8_t stack = sel[9];
uint8_t sel_error_type = sel[13];
uint8_t sel_error_severity = sel[14];
uint8_t sel_error_id = sel[15];
sprintf(error_log, "GeneralInfo: IIOErr(0x%02X), IIO Port Location: Sled %02d/Socket %02d, Stack 0x%02X, Error Type: 0x%02X, Error Severity: 0x%02X, Error ID: 0x%02X",
general_info, dimm_info.sled, dimm_info.socket, stack, sel_error_type, sel_error_severity, sel_error_id);
sprintf(temp_log, "IIO_ERR CPU%d. Error ID(%02X)",dimm_info.socket, sel_error_id);
pal_add_cri_sel(temp_log);
break;
}
case UNIFIED_POST_ERR:
event_type = sel[8] & 0xF;
estr_idx = (event_type < ARRAY_SIZE(post_err)) ? event_type : (ARRAY_SIZE(post_err) - 1);
sprintf(error_log, "GeneralInfo: POST(0x%02X), POST Failure Event: %s", general_info, post_err[estr_idx]);
break;
case UNIFIED_PCIE_EVENT:
event_type = sel[8] & 0xF;
estr_idx = (event_type < ARRAY_SIZE(pcie_event)) ? event_type : (ARRAY_SIZE(pcie_event) - 1);
switch (event_type) {
case PCIE_DPC:
sprintf(error_log, "GeneralInfo: PCIeEvent(0x%02X), PCIe Failure Event: %s, Status: 0x%04X, Source ID: 0x%04X",
general_info, pcie_event[estr_idx], (sel[11]<<8)|sel[10], (sel[13]<<8)|sel[12]);
break;
default:
sprintf(error_log, "GeneralInfo: PCIeEvent(0x%02X), PCIe Failure Event: %s",
general_info, pcie_event[estr_idx]);
break;
}
break;
case UNIFIED_MEM_EVENT:
// get dimm location data string.
get_common_dimm_location_str(dimm_info, dimm_location_str, dimm_str);
// Event-Type Bit[3:0]
event_type = sel[12] & 0x0F;
switch (event_type) {
case MEM_PPR:
sprintf(error_log, "GeneralInfo: MemEvent(0x%02X), %s, DIMM Failure Event: %s",
general_info, dimm_location_str, (sel[13]&0x01)?"PPR fail":"PPR success");
break;
case MEM_NO_DIMM:
sprintf(error_log, "GeneralInfo: MemEvent(0x%02X), DIMM Failure Event: %s",
general_info, mem_event[event_type]);
break;
default:
estr_idx = (event_type < ARRAY_SIZE(mem_event)) ? event_type : (ARRAY_SIZE(mem_event) - 1);
sprintf(error_log, "GeneralInfo: MemEvent(0x%02X), %s, DIMM Failure Event: %s",
general_info, dimm_location_str, mem_event[estr_idx]);
break;
}
break;
case UNIFIED_UPI_EVENT:
event_type = sel[12] & 0xF;
estr_idx = (event_type < ARRAY_SIZE(upi_event)) ? event_type : (ARRAY_SIZE(upi_event) - 1);
sprintf(error_log, "GeneralInfo: UPIEvent(0x%02X), UPI Port Location: Sled %02d/Socket %02d, Port %02d, UPI Failure Event: %s",
general_info, dimm_info.sled, dimm_info.socket, sel[9]&0xF, upi_event[estr_idx]);
break;
case UNIFIED_BOOT_GUARD:
sprintf(error_log, "GeneralInfo: Boot Guard ACM Failure Events(0x%02X), Error Class(0x%02X), Error Code(0x%02X)",
general_info, sel[8], sel[9]);
break;
default:
sprintf(error_log, "Undefined Error Type(0x%02X), Raw: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",
error_type, sel[3], sel[4], sel[5], sel[6], sel[7], sel[8], sel[9], sel[10], sel[11], sel[12], sel[13],
sel[14], sel[15]);
break;
}
return 0;
}