in common/recipes-utils/cpldupdate/files/ivm_core.c [1385:1564]
signed char ispVMShift( signed char a_cCode )
{
//09/11/07 NN added local variables initialization
unsigned short iDataIndex = 0;
unsigned short iReadLoop = 0;
signed char cRetCode = 0;
cRetCode=0;
//09/11/07 NN Type cast mismatch variables
g_usiDataSize = (unsigned short) ispVMDataSize();
g_usDataType &= ~( SIR_DATA + EXPRESS + SDR_DATA ); /*clear the flags first*/
switch ( a_cCode ) {
case SIR:
g_usDataType |= SIR_DATA;
/* 1/15/04 If performing cascading, then go directly to SHIFTIR. Else,
go to IRPAUSE before going to SHIFTIR */
if ( g_usFlowControl & CASCADE ) {
ispVMStateMachine( SHIFTIR );
}
else {
ispVMStateMachine( IRPAUSE );
ispVMStateMachine( SHIFTIR );
if ( g_usHeadIR > 0 ){
ispVMBypass( HIR, g_usHeadIR );
sclock();
}
}
break;
case XSDR:
g_usDataType |= EXPRESS; /*mark simultaneous in and out*/
case SDR:
g_usDataType |= SDR_DATA;
/* 1/15/04 If already in SHIFTDR, then do not move state or shift in header.
This would imply that the previously shifted frame was a cascaded frame. */
if ( g_cCurrentJTAGState != SHIFTDR ) {
/* 1/15/04 If performing cascading, then go directly to SHIFTDR. Else,
go to DRPAUSE before going to SHIFTDR */
if ( g_usFlowControl & CASCADE ) {
if ( g_cCurrentJTAGState == DRPAUSE ) {
ispVMStateMachine( SHIFTDR );
/* 1/15/04 If cascade flag has been set and the current state is
DRPAUSE, this implies that the first cascaded frame is about to
be shifted in. The header must be shifted prior to shifting
the first cascaded frame. */
if ( g_usHeadDR > 0 ) {
ispVMBypass( HDR, g_usHeadDR );
sclock();
}
}
else {
ispVMStateMachine( SHIFTDR );
}
}
else {
ispVMStateMachine( DRPAUSE );
ispVMStateMachine( SHIFTDR );
if ( g_usHeadDR > 0 ) {
ispVMBypass( HDR, g_usHeadDR );
sclock();
}
}
}
break;
default:
return ( VME_INVALID_FILE );
}
cRetCode = ispVMDataCode();
if ( cRetCode != 0 ) {
return ( VME_INVALID_FILE );
}
#ifdef VME_DEBUG
printf( "%d ", g_usiDataSize );
if ( g_usDataType & TDI_DATA ) {
printf( "TDI " );
PrintData( g_usiDataSize, g_pucInData );
}
if ( g_usDataType & TDO_DATA ) {
printf( "\n\t\tTDO " );
PrintData( g_usiDataSize, g_pucOutData );
}
if ( g_usDataType & MASK_DATA ) {
printf( "\n\t\tMASK " );
PrintData( g_usiDataSize, g_pucOutMaskData );
}
if ( g_usDataType & DMASK_DATA ) {
printf( "\n\t\tDMASK " );
PrintData( g_usiDataSize, g_pucOutDMaskData );
}
printf( ";\n" );
#endif //VME_DEBUG
if ( g_usDataType & TDO_DATA || g_usDataType & DMASK_DATA ) {
if(g_usDataType & DMASK_DATA){
cRetCode = ispVMReadandSave( g_usiDataSize );
if(!cRetCode){
if ( g_usTailDR > 0 ) {
sclock();
ispVMBypass( TDR, g_usTailDR );
}
ispVMStateMachine( DRPAUSE );
ispVMStateMachine( SHIFTDR );
if( g_usHeadDR > 0 ){
ispVMBypass( HDR, g_usHeadDR );
sclock();
}
for ( iDataIndex=0; iDataIndex < g_usiDataSize / 8 + 1; iDataIndex++ )
g_pucInData[ iDataIndex ] = g_pucOutData[ iDataIndex ];
g_usDataType &= ~( TDO_DATA+ DMASK_DATA );
cRetCode = ispVMSend( g_usiDataSize );
}
}
else{
cRetCode = ispVMRead( g_usiDataSize );
if ( cRetCode == -1 && g_cVendor == XILINX ) {
for( iReadLoop = 0; iReadLoop < 30; iReadLoop++ ){
cRetCode = ispVMRead( g_usiDataSize );
if( !cRetCode ) {
break;
}
else {
ispVMStateMachine( DRPAUSE ); /*Always DRPAUSE*/
/*Bypass other devices when appropriate*/
ispVMBypass( TDR, g_usTailDR );
ispVMStateMachine( g_ucEndDR );
ispVMStateMachine( IDLE );
ispVMDelay( 1000 );
}
}
}
}
}
else { /*TDI only*/
cRetCode = ispVMSend( g_usiDataSize );
}
/*transfer the input data to the output buffer for the next verify*/
if ( ( g_usDataType & EXPRESS ) || ( a_cCode == SDR ) ) {
if ( g_pucOutData ) {
for ( iDataIndex=0; iDataIndex < g_usiDataSize / 8 + 1; iDataIndex++ )
g_pucOutData[ iDataIndex ] = g_pucInData[ iDataIndex ];
}
}
switch( a_cCode ) {
case SIR:
/* 1/15/04 If not performing cascading, then shift ENDIR */
if ( !( g_usFlowControl & CASCADE ) ) {
if ( g_usTailIR > 0 ) {
sclock();
ispVMBypass( TIR, g_usTailIR );
}
ispVMStateMachine( g_ucEndIR );
}
break;
case XSDR:
case SDR:
/* 1/15/04 If not performing cascading, then shift ENDDR */
if ( !( g_usFlowControl & CASCADE ) ) {
if ( g_usTailDR > 0 ) {
sclock();
ispVMBypass( TDR, g_usTailDR );
}
ispVMStateMachine( g_ucEndDR );
}
break;
default:
break;
}
return ( cRetCode );
}