in common/shell/shell_platform.c [263:325]
static void cmd_gpio_cfg_list_group(const struct shell *shell, size_t argc, char **argv)
{
if (argc != 2) {
shell_warn(shell, "Help: platform gpio list_group <gpio_device>");
return;
}
const struct device *dev;
dev = device_get_binding(argv[1]);
if (!dev) {
shell_error(shell, "Device [%s] not found!", argv[1]);
return;
}
int g_idx = gpio_get_group_idx_by_dev_name(dev->name);
int max_group_pin = num_of_pin_in_one_group_lst[g_idx];
uint32_t g_val = sys_read32(GPIO_GROUP_REG_ACCESS[g_idx]);
uint32_t g_dir = sys_read32(GPIO_GROUP_REG_ACCESS[g_idx] + 0x4);
int rc;
for (int index = 0; index < max_group_pin; index++) {
if (gpio_cfg[g_idx * 32 + index].is_init == DISABLE) {
shell_print(shell, "[%-3d][%s %-3d] %-35s: -- | %-9s | NA",
g_idx * 32 + index, dev->name, index, "gpio_disable", "i/o");
continue;
}
#if PINMASK_RESERVE_CHECK
/* avoid pin_mask from devicetree "gpio-reserved" */
if (gpio_check_reserve(dev, index, CHECK_BY_GROUP_IDX)) {
shell_print(shell, "[%-3d][%s %-3d] %-35s: -- | %-9s | NA",
g_idx * 32 + index, dev->name, index, "gpio_reserve", "i/o");
continue;
}
#endif
char *pin_dir = "output";
if (gpio_cfg[g_idx * 32 + index].direction == GPIO_INPUT)
pin_dir = "input";
char *pin_dir_reg = "I";
if (g_dir & BIT(index))
pin_dir_reg = "O";
char *pin_prop =
(gpio_cfg[g_idx * 32 + index].property == OPEN_DRAIN) ? "OD" : "PP";
rc = gpio_pin_get(dev, index);
if (rc >= 0) {
shell_print(shell, "[%-3d][%s %-3d] %-35s: %2s | %-6s(%s) | %d(%d)",
g_idx * 32 + index, dev->name, index,
gpio_get_name(dev->name, index), pin_prop, pin_dir, pin_dir_reg,
rc, GET_BIT_VAL(g_val, index));
} else {
shell_error(shell, "[%-3d][%s %-3d] %-35s: %2s | %-6s | err[%d]",
g_idx * 32 + index, dev->name, index,
gpio_get_name(dev->name, index), pin_prop, pin_dir, rc);
}
}
return;
}