in common/sensor/dev/intel_peci.c [110:200]
static bool get_dimm_temp(uint8_t addr, uint8_t type, int *reading)
{
if (!reading)
return false;
uint8_t temp_ofs = 0xFF;
uint16_t param = 0xFF;
switch (type) {
case PECI_TEMP_CHANNEL0_DIMM0:
param = 0x00;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL0_DIMM1:
param = 0x00;
temp_ofs = DIMM_TEMP_OFS_1;
break;
case PECI_TEMP_CHANNEL1_DIMM0:
param = 0x01;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL1_DIMM1:
param = 0x01;
temp_ofs = DIMM_TEMP_OFS_1;
break;
case PECI_TEMP_CHANNEL2_DIMM0:
param = 0x02;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL2_DIMM1:
param = 0x02;
temp_ofs = DIMM_TEMP_OFS_1;
break;
case PECI_TEMP_CHANNEL3_DIMM0:
param = 0x03;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL3_DIMM1:
param = 0x03;
temp_ofs = DIMM_TEMP_OFS_1;
break;
case PECI_TEMP_CHANNEL4_DIMM0:
param = 0x04;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL4_DIMM1:
param = 0x04;
temp_ofs = DIMM_TEMP_OFS_1;
break;
case PECI_TEMP_CHANNEL5_DIMM0:
param = 0x05;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL5_DIMM1:
param = 0x05;
temp_ofs = DIMM_TEMP_OFS_1;
break;
case PECI_TEMP_CHANNEL6_DIMM0:
param = 0x06;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL6_DIMM1:
param = 0x06;
temp_ofs = DIMM_TEMP_OFS_1;
break;
case PECI_TEMP_CHANNEL7_DIMM0:
param = 0x07;
temp_ofs = DIMM_TEMP_OFS_0;
break;
case PECI_TEMP_CHANNEL7_DIMM1:
param = 0x07;
temp_ofs = DIMM_TEMP_OFS_1;
break;
default:
break;
}
if (param == 0xFF || temp_ofs == 0xFF)
return false;
const uint8_t rlen = 0x05;
uint8_t rbuf[rlen];
memset(rbuf, 0, sizeof(rbuf));
if (peci_read_retry(PECI_CMD_RD_PKG_CFG0, addr, RDPKG_IDX_DIMM_TEMP, param, rlen, rbuf) ==
false)
return false;
sensor_val *sval = (sensor_val *)reading;
sval->integer = rbuf[temp_ofs];
return true;
}