in rtl/log/luts/gen_tables.py [0:0]
def get_log2_expansion(i, in_bits, out_bits, enable_rounding=True):
prec_bits = out_bits * 4
fam20 = FixedPoint.FXfamily(prec_bits)
x = (FixedPoint.FXnum(i, fam20) / (2 ** in_bits))
orig_str = x.toBinaryString()[2:2+in_bits]
x = (x + 1).log() / math.log(2)
pow2_str = x.toBinaryString()
keep_bit = pow2_str[2+out_bits-1] == '1'
guard_bit = pow2_str[2+out_bits] == '1'
round_bit = pow2_str[2+out_bits+1] == '1'
sticky_bits = pow2_str[2+out_bits+2:].find('1') != -1
round_down = (not guard_bit) or ((not keep_bit) and guard_bit and (not round_bit) and (not sticky_bits))
if (not round_down and enable_rounding):
add = FixedPoint.FXnum(1, fam20) >> out_bits
x = x + add
before_round = pow2_str[2:2+out_bits]
after_round = x.toBinaryString()[2:2+out_bits]
is_overlap = False
if after_round in overlaps:
is_overlap = True
else:
overlaps[after_round] = True
return orig_str, before_round, after_round, not round_down, is_overlap