bool X86MachineInstructionRaiser::raiseSSEConvertPrecisionFromMemMachineInstr()

in X86/X86MachineInstructionRaiserSSE.cpp [352:451]
90 lines of code
53 McCabe index (conditional complexity)

bool X86MachineInstructionRaiser::raiseSSEConvertPrecisionFromMemMachineInstr(
    const MachineInstr &MI, Value *MemRefValue) {
  LLVMContext &Ctx(MF.getFunction().getContext());
  BasicBlock *RaisedBB = getRaisedBasicBlock(MI.getParent());

  Type *CastTy;
  Type *SrcTy;
  switch (MI.getOpcode()) {
  case X86::CVTSD2SIrm_Int:
  case X86::CVTSS2SIrm_Int:
  case X86::CVTTSD2SIrm:
  case X86::CVTTSD2SIrm_Int:
  case X86::CVTTSS2SIrm:
  case X86::CVTTSS2SIrm_Int:
    CastTy = Type::getInt32Ty(Ctx);
    break;
  case X86::CVTSD2SI64rm_Int:
  case X86::CVTSS2SI64rm_Int:
  case X86::CVTTSD2SI64rm:
  case X86::CVTTSD2SI64rm_Int:
  case X86::CVTTSS2SI64rm:
  case X86::CVTTSS2SI64rm_Int:
    CastTy = Type::getInt64Ty(Ctx);
    break;
  case X86::CVTSD2SSrm:
  case X86::CVTSD2SSrm_Int:
  case X86::CVTSI2SSrm:
  case X86::CVTSI2SSrm_Int:
  case X86::CVTSI642SSrm:
  case X86::CVTSI642SSrm_Int:
    CastTy = Type::getFloatTy(Ctx);
    break;
  case X86::CVTSI2SDrm:
  case X86::CVTSI2SDrm_Int:
  case X86::CVTSI642SDrm:
  case X86::CVTSI642SDrm_Int:
  case X86::CVTSS2SDrm:
  case X86::CVTSS2SDrm_Int:
    CastTy = Type::getDoubleTy(Ctx);
    break;
  }
  // Need to figure out the source type, since we don't know that
  // just from the MemoryRefValue
  switch (MI.getOpcode()) {
  case X86::CVTSD2SIrm_Int:
  case X86::CVTSD2SI64rm_Int:
  case X86::CVTSD2SSrm:
  case X86::CVTSD2SSrm_Int:
  case X86::CVTTSD2SIrm:
  case X86::CVTTSD2SIrm_Int:
  case X86::CVTTSD2SI64rm:
  case X86::CVTTSD2SI64rm_Int:
    SrcTy = Type::getDoubleTy(Ctx);
    break;
  case X86::CVTSS2SIrm_Int:
  case X86::CVTTSS2SIrm:
  case X86::CVTTSS2SIrm_Int:
  case X86::CVTSS2SI64rm_Int:
  case X86::CVTTSS2SI64rm:
  case X86::CVTTSS2SI64rm_Int:
  case X86::CVTSS2SDrm:
  case X86::CVTSS2SDrm_Int:
    SrcTy = Type::getFloatTy(Ctx);
    break;
  case X86::CVTSI642SSrm:
  case X86::CVTSI642SSrm_Int:
  case X86::CVTSI642SDrm:
  case X86::CVTSI642SDrm_Int:
    SrcTy = Type::getInt64Ty(Ctx);
    break;
  case X86::CVTSI2SSrm:
  case X86::CVTSI2SSrm_Int:
  case X86::CVTSI2SDrm:
  case X86::CVTSI2SDrm_Int:
    SrcTy = Type::getInt32Ty(Ctx);
    break;
  }
  assert(SrcTy != nullptr && CastTy != nullptr &&
         "Unhandled sse conversion instruction");

  MCInstrDesc MCIDesc = MI.getDesc();

  unsigned int DstOpIdx = 0, MemoryRefOpIndex = getMemoryRefOpIndex(MI);

  assert(MCIDesc.getNumDefs() == 1 &&
         "Unexpected defs found in SSE conversion instruction");

  MachineOperand DstOp = MI.getOperand(DstOpIdx);
  assert(DstOp.isReg() && "Expected destination to be a register");

  Value *SrcVal = loadMemoryRefValue(MI, MemRefValue, MemoryRefOpIndex, SrcTy);

  auto CastInst =
      CastInst::Create(CastInst::getCastOpcode(SrcVal, true, CastTy, true),
                       SrcVal, CastTy, "cvt", RaisedBB);
  raisedValues->setPhysRegSSAValue(DstOp.getReg(), MI.getParent()->getNumber(),
                                   CastInst);

  return true;
}