RETURN_STATUS ArchVectorConfig()

in ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c [46:131]

• 37 lines of code
• 3 McCabe index (conditional complexity)

RETURN_STATUS ArchVectorConfig(
  IN  UINTN       VectorBaseAddress
  );

// these globals are provided by the architecture specific source (Arm or AArch64)
extern UINTN                    gMaxExceptionNumber;
extern EFI_EXCEPTION_CALLBACK   gExceptionHandlers[];
extern EFI_EXCEPTION_CALLBACK   gDebuggerExceptionHandlers[];
extern PHYSICAL_ADDRESS         gExceptionVectorAlignmentMask;
extern UINTN                    gDebuggerNoHandlerValue;

// A compiler flag adjusts the compilation of this library to a variant where
// the vectors are relocated (copied) to another location versus using the
// vectors in-place.  Since this effects an assembly .align directive we must
// address this at library build time.  Since this affects the build of the
// library we cannot represent this in a PCD since PCDs are evaluated on
// a per-module basis.
#if defined(ARM_RELOCATE_VECTORS)
STATIC CONST BOOLEAN gArmRelocateVectorTable = TRUE;
#else
STATIC CONST BOOLEAN gArmRelocateVectorTable = FALSE;
#endif


/**
Initializes all CPU exceptions entries and provides the default exception handlers.

Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.

@param[in]  VectorInfo    Pointer to reserved vector list.

@retval EFI_SUCCESS           CPU Exception Entries have been successfully initialized
with default exception handlers.
@retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
@retval EFI_UNSUPPORTED       This function is not supported.

**/
EFI_STATUS
EFIAPI
InitializeCpuExceptionHandlers(
  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
  )
{
  RETURN_STATUS     Status;
  UINTN             VectorBase;

  Status = EFI_SUCCESS;

  // if we are requested to copy exception handlers to another location
  if (gArmRelocateVectorTable) {

    VectorBase = (UINTN)PcdGet64(PcdCpuVectorBaseAddress);
    Status = CopyExceptionHandlers(VectorBase);

  }
  else { // use VBAR to point to where our exception handlers are

    // The vector table must be aligned for the architecture.  If this
    // assertion fails ensure the appropriate FFS alignment is in effect,
    // which can be accomplished by ensuring the proper Align=X statement
    // in the platform packaging rules.  For ARM Align=32 is required and
    // for AArch64 Align=4K is required.  Align=Auto can be used but this
    // is known to cause an issue with populating the reset vector area
    // for encapsulated FVs.
    ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);

    // We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
    // Base Address to point into CpuDxe code.
    VectorBase = (UINTN)ExceptionHandlersStart;

    Status = RETURN_SUCCESS;
  }

  if (!RETURN_ERROR(Status)) {
    // call the architecture-specific routine to prepare for the new vector
    // configuration to take effect
    ArchVectorConfig(VectorBase);

    ArmWriteVBar(VectorBase);
  }

  return RETURN_SUCCESS;
}