in disassembler/disassembler_mips.cc [411:572]
size_t DisassemblerMips::Dump(std::ostream& os, const uint8_t* instr_ptr) {
uint32_t instruction = ReadU32(instr_ptr);
uint32_t rs = (instruction >> 21) & 0x1f; // I-type, R-type.
uint32_t rt = (instruction >> 16) & 0x1f; // I-type, R-type.
uint32_t rd = (instruction >> 11) & 0x1f; // R-type.
uint32_t sa = (instruction >> 6) & 0x1f; // R-type.
std::string opcode;
std::ostringstream args;
// TODO: remove this!
uint32_t op = (instruction >> 26) & 0x3f;
uint32_t function = (instruction & 0x3f); // R-type.
opcode = StringPrintf("op=%d fn=%d", op, function);
for (size_t i = 0; i < arraysize(gMipsInstructions); ++i) {
if (gMipsInstructions[i].Matches(instruction)) {
opcode = gMipsInstructions[i].name;
for (const char* args_fmt = gMipsInstructions[i].args_fmt; *args_fmt; ++args_fmt) {
switch (*args_fmt) {
case 'A': // sa (shift amount or [d]ins/[d]ext position).
args << sa;
break;
case 'B': // Branch offset.
{
int32_t offset = static_cast<int16_t>(instruction & 0xffff);
offset <<= 2;
offset += 4; // Delay slot.
args << FormatInstructionPointer(instr_ptr + offset)
<< StringPrintf(" ; %+d", offset);
}
break;
case 'b': // 21-bit branch offset.
{
int32_t offset = (instruction & 0x1fffff) - ((instruction & 0x100000) << 1);
offset <<= 2;
offset += 4; // Delay slot.
args << FormatInstructionPointer(instr_ptr + offset)
<< StringPrintf(" ; %+d", offset);
}
break;
case 'C': // Floating-point condition code flag in c.<cond>.fmt.
args << "cc" << (sa >> 2);
break;
case 'c': // Floating-point condition code flag in bc1f/bc1t and movf/movt.
args << "cc" << (rt >> 2);
break;
case 'D': args << 'r' << rd; break;
case 'd': args << 'f' << rd; break;
case 'a': args << 'f' << sa; break;
case 'f': // Floating point "fmt".
{
size_t fmt = (instruction >> 21) & 0x7; // TODO: other fmts?
switch (fmt) {
case 0: opcode += ".s"; break;
case 1: opcode += ".d"; break;
case 4: opcode += ".w"; break;
case 5: opcode += ".l"; break;
case 6: opcode += ".ps"; break;
default: opcode += ".?"; break;
}
continue; // No ", ".
}
case 'I': // Upper 16-bit immediate.
args << reinterpret_cast<void*>((instruction & 0xffff) << 16);
break;
case 'i': // Sign-extended lower 16-bit immediate.
args << static_cast<int16_t>(instruction & 0xffff);
break;
case 'L': // Jump label.
{
// TODO: is this right?
uint32_t instr_index = (instruction & 0x1ffffff);
uint32_t target = (instr_index << 2);
target |= (reinterpret_cast<uintptr_t>(instr_ptr + 4) & 0xf0000000);
args << reinterpret_cast<void*>(target);
}
break;
case 'l': // 9-bit signed offset
{
int32_t offset = static_cast<int16_t>(instruction) >> 7;
args << StringPrintf("%+d(r%d)", offset, rs);
}
break;
case 'O': // +x(rs)
{
int32_t offset = static_cast<int16_t>(instruction & 0xffff);
args << StringPrintf("%+d(r%d)", offset, rs);
if (rs == 17) {
args << " ; ";
if (is64bit_) {
Thread::DumpThreadOffset<8>(args, offset);
} else {
Thread::DumpThreadOffset<4>(args, offset);
}
}
}
break;
case 'P': // 26-bit offset in bc.
{
int32_t offset = (instruction & 0x3ffffff) - ((instruction & 0x2000000) << 1);
offset <<= 2;
offset += 4;
args << FormatInstructionPointer(instr_ptr + offset);
args << StringPrintf(" ; %+d", offset);
}
break;
case 'p': // 19-bit offset in addiupc.
{
int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1);
args << offset << " ; move r" << rs << ", ";
args << FormatInstructionPointer(instr_ptr + (offset << 2));
}
break;
case 'S': args << 'r' << rs; break;
case 's': args << 'f' << rs; break;
case 'T': args << 'r' << rt; break;
case 't': args << 'f' << rt; break;
case 'Z': args << (rd + 1); break; // sz ([d]ext size).
case 'z': args << (rd - sa + 1); break; // sz ([d]ins size).
}
if (*(args_fmt + 1)) {
args << ", ";
}
}
break;
}
}
// Special cases for sequences of:
// pc-relative +/- 2GB branch:
// auipc reg, imm
// jic reg, imm
// pc-relative +/- 2GB branch and link:
// auipc reg, imm
// daddiu reg, reg, imm
// jialc reg, 0
if (((op == 0x36 && rs == 0 && rt != 0) || // jic
(op == 0x19 && rs == rt && rt != 0)) && // daddiu
last_ptr_ && (intptr_t)instr_ptr - (intptr_t)last_ptr_ == 4 &&
(last_instr_ & 0xFC1F0000) == 0xEC1E0000 && // auipc
((last_instr_ >> 21) & 0x1F) == rt) {
uint32_t offset = (last_instr_ << 16) | (instruction & 0xFFFF);
offset -= (offset & 0x8000) << 1;
offset -= 4;
if (op == 0x36) {
args << " ; b ";
} else {
args << " ; move r" << rt << ", ";
}
args << FormatInstructionPointer(instr_ptr + (int32_t)offset);
args << StringPrintf(" ; %+d", (int32_t)offset);
}
os << FormatInstructionPointer(instr_ptr)
<< StringPrintf(": %08x\t%-7s ", instruction, opcode.c_str())
<< args.str() << '\n';
last_ptr_ = instr_ptr;
last_instr_ = instruction;
return 4;
}