File Change History Overall
File Age Distribution Overall
Days since first update
  • There are 805 files with 162,147 lines of code in files.
    • 732 files that are 366+ days old (152,423 lines of code)
    • 16 files that are 181-365 days old (6,146 lines of code)
    • 12 files that are 91-180 days old (349 lines of code)
    • 45 files that are 31-90 days old (3,229 lines of code)
    • 0 files that are 1-30 days old (0 lines of code)
94% | 3% | <1% | 1% | 0%
Legend:
366+
181-365
91-180
31-90
1-30

explore: grouped by folders | grouped by age
File Freshness Distribution Overall
Days since last update
  • There are 805 files with 162,147 lines of code in files.
    • 619 files have been last changed 366+ days ago (134,473 lines of code)
    • 27 files have been last changed 181-365 days ago (9,371 lines of code)
    • 55 files have been last changed 91-180 days ago (9,452 lines of code)
    • 104 files have been last changed 31-90 days ago (8,851 lines of code)
    • 0 files have been last changed 1-30 days ago (0 lines of code)
82% | 5% | 5% | 5% | 0%
Legend:
366+
181-365
91-180
31-90
1-30

explore: grouped by folders | grouped by freshness
File Change History per File Extension
v, sv, tcl, py, json, mk, md, sh, yml, rb, cfg, sp, svh, gitignore, txt, yaml, scala, in, patch, toml, dockerignore, svg, sbt, bzl, nix, gitmodules, gitattributes, builder, properties
File Age Distribution per Extension
Days since first update
366+
181-365
91-180
31-90
1-30
sv100% | 0% | 0% | 0% | 0%
v91% | 8% | <1% | 0% | 0%
tcl89% | 3% | 4% | 2% | 0%
py58% | 2% | 1% | 38% | 0%
yaml96% | 3% | 0% | 0% | 0%
svh100% | 0% | 0% | 0% | 0%
rb100% | 0% | 0% | 0% | 0%
cfg88% | 0% | 0% | 11% | 0%
nix100% | 0% | 0% | 0% | 0%
toml100% | 0% | 0% | 0% | 0%
in16% | 0% | 83% | 0% | 0%
File Freshness Distribution per Extension
Days since last update
366+
181-365
91-180
31-90
1-30
sv91% | 0% | 8% | 0% | 0%
v86% | 11% | 1% | 1% | 0%
tcl39% | 8% | 11% | 41% | 0%
svh100% | 0% | 0% | 0% | 0%
py14% | 15% | 20% | 50% | 0%
rb100% | 0% | 0% | 0% | 0%
cfg74% | 14% | 0% | 11% | 0%
yaml7% | <1% | 3% | 88% | 0%
toml39% | 0% | 0% | 60% | 0%
in16% | 0% | 83% | 0% | 0%
nix0% | 100% | 0% | 0% | 0%
File Change History per Logical Decomposition
primary
primary (file age distribution)
Days since first update
366+
181-365
91-180
31-90
1-30
flow95% | 3% | <1% | <1% | 0%
tools34% | 1% | 0% | 63% | 0%
.github97% | 0% | 2% | 0% | 0%
ROOT100% | 0% | 0% | 0% | 0%
etc0% | 0% | 100% | 0% | 0%
primary (file freshness distribution)
Days since last update
366+
181-365
91-180
31-90
1-30
flow84% | 5% | 5% | 4% | 0%
tools3% | 16% | 15% | 63% | 0%
.github93% | 4% | 2% | 0% | 0%
ROOT13% | 52% | 12% | 21% | 0%
etc0% | 0% | 100% | 0% | 0%
Oldest Files (Top 50)
File# lines# unitscreatedlast modified# changes
(days)
# contributorsfirst
contributor
latest
contributor
tcl
io_placement.tcl
in flow/scripts
20 - 2019-12-05 2026-07-15 100 36 rovinski@umich.edu mkim@precisioninno.com
tcl
global_route.tcl
in flow/scripts
145 - 2019-12-10 2026-08-12 279 57 rovinski@umich.edu oyvind.harboe@zylin.com
tcl
detail_place.tcl
in flow/scripts
36 - 2019-12-10 2026-07-20 136 42 rovinski@umich.edu mkim@precisioninno.com
tcl
pdn.tcl
in flow/scripts
19 - 2019-12-12 2026-04-13 88 36 rovinski@umich.edu noam.chn1@gmail.com
tcl
global_place.tcl
in flow/scripts
62 - 2019-12-16 2026-07-13 228 47 rovinski@umich.edu augusto.berndt@precisioninn...
tcl
synth.tcl
in flow/scripts
267 - 2019-12-17 2026-07-20 232 57 ajayi@umich.edu mkim@precisioninno.com
v
AsyncResetReg.v
in flow/designs/src/tinyRocket
40 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
tcl
resize.tcl
in flow/scripts
33 - 2019-12-17 2026-07-13 162 42 ajayi@umich.edu augusto.berndt@precisioninn...
v
ClockDivider3.v
in flow/designs/src/tinyRocket
15 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
plusarg_reader.v
in flow/designs/src/tinyRocket
11 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
ClockDivider2.v
in flow/designs/src/tinyRocket
2 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
tcl
cts.tcl
in flow/scripts
67 - 2019-12-18 2026-07-15 267 54 mateus.p.fogaca@gmail.com mliberty@precisioninno.com
tcl
macro_place.tcl
in flow/scripts
9 - 2019-12-19 2026-04-13 125 38 ajayi@umich.edu noam.chn1@gmail.com
tcl
tapcell.tcl
in flow/scripts
12 - 2019-12-20 2026-04-13 68 25 ajayi@umich.edu noam.chn1@gmail.com
addDummyToLef.py
in flow/util
25 - 2019-12-23 2026-04-13 11 13 ajayi@umich.edu noam.chn1@gmail.com
cfg
template_pga.cfg
in flow/platforms/nangate45
10 - 2019-12-23 2020-02-06 4 3 chhab011@umn.edu rovinski@users.noreply.gith...
tcl
klayout.tcl
in flow/scripts
18 - 2020-01-27 2025-08-25 24 18 ajayi@umich.edu arthurjolo@gmail.com
tcl
tapcell.tcl
in flow/platforms/nangate45
4 - 2020-01-27 2025-08-25 21 15 ajayi@umich.edu arthurjolo@gmail.com
tcl
yosys.tcl
in flow/scripts
1 - 2020-01-27 2020-02-06 3 3 ajayi@umich.edu rovinski@users.noreply.gith...
tcl
final_report.tcl
in flow/scripts
7 - 2020-01-28 2026-07-20 183 50 ajayi@umich.edu mkim@precisioninno.com
tcl
floorplan.tcl
in flow/scripts
151 - 2020-02-01 2026-07-13 224 52 rovinski@umich.edu augusto.berndt@precisioninn...
v
dct_cos_table.v
in flow/designs/src/jpeg/include
4295 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
div_uu.v
in flow/designs/src/jpeg
72 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dctu.v
in flow/designs/src/jpeg
37 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dctub.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
div_su.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_rzs.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
fdct.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_rle.v
in flow/designs/src/jpeg
2 - 2020-02-06 2026-05-18 7 7 ajayi@umich.edu dsengupta@precisioninno.com
v
jpeg_qnr.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_rle1.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dct_mac.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dct.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_encoder.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
zigzag.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
aes_inv_sbox.v
in flow/designs/src/aes
1 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
aes_rcon.v
in flow/designs/src/aes
1 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
aes_sbox.v
in flow/designs/src/aes
1 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
cells_clkgate.v
in flow/platforms/nangate45
8 - 2020-02-07 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
checkMetadata.py
in flow/util
94 1 2020-02-27 2026-08-03 49 23 matt.liberty@gmail.com mliberty@precisioninno.com
appendStatsToDb.py
in flow/util
69 - 2020-03-04 2026-04-09 9 10 rovinski@umich.edu kimi.h.kuparinen@gmail.com
tcl
fillcell.tcl
in flow/scripts
14 - 2020-03-26 2026-07-15 76 32 rovinski@umich.edu mkim@precisioninno.com
10 - 2020-05-11 2025-08-25 12 10 rovinski@umich.edu arthurjolo@gmail.com
tcl
add_routing_blk.tcl
in flow/scripts
38 - 2020-05-13 2025-08-25 14 13 rovinski@umich.edu arthurjolo@gmail.com
viewDrc.py
in flow/util
47 - 2020-05-20 2024-07-31 4 6 matt.liberty@gmail.com arthurckoucher@gmail.com
v
macros.v
in flow/designs/nangate45/bp_multi_top
147 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/black_parrot
131 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/bp_fe_top
91 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
freechips.rocketchip.system.TinyConfig.v
in flow/designs/nangate45/tinyRocket
70 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/bp_be_top
65 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
Files Not Recently Changed (Top 50)
File# lines# unitscreatedlast modified# changes
(days)
# contributorsfirst
contributor
latest
contributor
v
ClockDivider2.v
in flow/designs/src/tinyRocket
2 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
plusarg_reader.v
in flow/designs/src/tinyRocket
11 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
ClockDivider3.v
in flow/designs/src/tinyRocket
15 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
AsyncResetReg.v
in flow/designs/src/tinyRocket
40 - 2019-12-17 2019-12-18 2 2 ajayi@umich.edu rovinski@users.noreply.gith...
tcl
yosys.tcl
in flow/scripts
1 - 2020-01-27 2020-02-06 3 3 ajayi@umich.edu rovinski@users.noreply.gith...
cfg
template_pga.cfg
in flow/platforms/nangate45
10 - 2019-12-23 2020-02-06 4 3 chhab011@umn.edu rovinski@users.noreply.gith...
v
aes_sbox.v
in flow/designs/src/aes
1 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
aes_rcon.v
in flow/designs/src/aes
1 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
aes_inv_sbox.v
in flow/designs/src/aes
1 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
zigzag.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_encoder.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dct.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dct_mac.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_rle1.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_qnr.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
fdct.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
jpeg_rzs.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
div_su.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dctub.v
in flow/designs/src/jpeg
2 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
cells_clkgate.v
in flow/platforms/nangate45
8 - 2020-02-07 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dctu.v
in flow/designs/src/jpeg
37 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
div_uu.v
in flow/designs/src/jpeg
72 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
v
dct_cos_table.v
in flow/designs/src/jpeg/include
4295 - 2020-02-06 2020-02-14 3 2 ajayi@umich.edu rovinski@users.noreply.gith...
cfg
fakeram.cfg
in flow/designs/nangate45/black_parrot
17 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/swerv
51 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/bp_be_top
65 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
freechips.rocketchip.system.TinyConfig.v
in flow/designs/nangate45/tinyRocket
70 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/bp_fe_top
91 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/black_parrot
131 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
v
macros.v
in flow/designs/nangate45/bp_multi_top
147 - 2020-05-26 2020-06-07 2 2 rovinski@umich.edu rovinski@umich.edu
tcl
wrappers.tcl
in flow/designs/gf12/swerv_wrapper
12 - 2020-10-26 2020-11-01 2 2 matt.liberty@gmail.com rovinski@users.noreply.gith...
tcl
wrappers.tcl
in flow/designs/gf12/tinyRocket
12 - 2020-10-05 2020-11-01 4 3 46945466+tspyrou@users.nore... rovinski@users.noreply.gith...
v
macros.v
in flow/designs/gf12/tinyRocket
125 - 2020-10-05 2020-11-01 4 3 46945466+tspyrou@users.nore... rovinski@users.noreply.gith...
tcl
wrappers.tcl
in flow/designs/gf12/coyote
14 - 2020-11-07 2020-11-13 3 3 mik226@eng.ucsd.edu rovinski@users.noreply.gith...
v
macros.v
in flow/designs/gf12/coyote
103 - 2020-11-07 2020-11-13 3 3 mik226@eng.ucsd.edu rovinski@users.noreply.gith...
v
cells_clkgate_hs.v
in flow/platforms/sky130hs
8 - 2021-01-21 2021-02-28 6 6 mehdi@vlsipool-j10.eecs.umi... osama21@aucegypt.edu
v
cells_clkgate_hd.v
in flow/platforms/sky130hd
8 - 2021-01-21 2021-02-28 6 6 mehdi@vlsipool-j10.eecs.umi... osama21@aucegypt.edu
v
cells_latch_hs.v
in flow/platforms/sky130hs
14 - 2021-01-21 2021-02-28 6 6 mehdi@vlsipool-j10.eecs.umi... osama21@aucegypt.edu
v
cells_latch_hd.v
in flow/platforms/sky130hd
14 - 2021-01-21 2021-02-28 6 6 mehdi@vlsipool-j10.eecs.umi... osama21@aucegypt.edu
v
AHBlite_bus0.v
in flow/designs/src/chameleon/AHB_sys_0
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
APB_WDT32.v
in flow/designs/src/chameleon/AHB_sys_0/APB_sys_0
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
APB_bus0.v
in flow/designs/src/chameleon/AHB_sys_0/APB_sys_0
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
APB_TIMER32.v
in flow/designs/src/chameleon/AHB_sys_0/APB_sys_0
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
APB_PWM32.v
in flow/designs/src/chameleon/AHB_sys_0/APB_sys_0
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
AHBlite_GPIO.v
in flow/designs/src/chameleon/AHB_sys_0
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
AHBlite_db_reg.v
in flow/designs/src/chameleon/AHB_sys_0
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
ibex_tracer_pkg.v
in flow/designs/src/chameleon/ibex/models
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
ibex_pkg.v
in flow/designs/src/chameleon/ibex
1 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
v
APB_sys_0.v
in flow/designs/src/chameleon/AHB_sys_0/APB_sys_0
5 - 2021-02-25 2021-03-10 4 5 mehdi@vlsipool-j02.eecs.umi... 46945466+tspyrou@users.nore...
tcl
make_tracks.tcl
in flow/platforms/sky130hs
6 - 2021-03-01 2021-03-10 3 6 osama21@aucegypt.edu 46945466+tspyrou@users.nore...
Most Recently Created Files (Top 50)
File# lines# unitscreatedlast modified# changes
(days)
# contributorsfirst
contributor
latest
contributor
v
gcd.v
in flow/designs/src/gcd
449 -
v
cells_latch.v
in flow/platforms/nangate45
14 -
v
aes_cipher_top.v
in flow/designs/src/aes
1 -
v
aes_inv_cipher_top.v
in flow/designs/src/aes
1 -
v
aes_key_expand_128.v
in flow/designs/src/aes
1 -
v
timescale.v
in flow/designs/src/aes
1 -
liberty_exporter.py
in tools/FakeRAM2.0/utils
384 22 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
basic_port_creator.py
in tools/FakeRAM2.0/utils
193 10 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
spreadsheet_ram.py
in tools/FakeRAM2.0
188 8 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
detect.py
in flow/scripts/memories
151 3 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
class_memory.py
in tools/FakeRAM2.0/utils
147 32 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
schema.py
in flow/scripts/memories
146 8 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
verilog_exporter.py
in tools/FakeRAM2.0/utils
141 13 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
single_port_ram_verilog_exporter.py
in tools/FakeRAM2.0/utils
128 6 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
lef_exporter.py
in tools/FakeRAM2.0/utils
127 10 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
class_process.py
in tools/FakeRAM2.0/utils
119 28 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
gen_memories.py
in flow/scripts/memories
119 3 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
ss_port_organizer.py
in tools/FakeRAM2.0/utils
94 7 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
timing_data.py
in tools/FakeRAM2.0/utils
66 20 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
physical_data.py
in tools/FakeRAM2.0/utils
61 10 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
rw_port_group.py
in tools/FakeRAM2.0/utils
56 18 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
ram_verilog_exporter.py
in tools/FakeRAM2.0/utils
47 5 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
run_utils.py
in tools/FakeRAM2.0/utils
45 5 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
port.py
in tools/FakeRAM2.0/utils
35 12 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
single_port_ram_liberty_exporter.py
in tools/FakeRAM2.0/utils
35 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
run.py
in tools/FakeRAM2.0
34 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
ss_port_creator.py
in tools/FakeRAM2.0/utils
34 4 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
memory_config.py
in tools/FakeRAM2.0/utils
28 8 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
single_port_ram.py
in tools/FakeRAM2.0/utils
27 4 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
cfg
example_input_file.cfg
in tools/FakeRAM2.0
27 - 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
idiomatic.py
in flow/scripts/memories
26 2 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
regfile_verilog_exporter.py
in tools/FakeRAM2.0/utils
23 3 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
ram_liberty_exporter.py
in tools/FakeRAM2.0/utils
22 3 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
factory_base.py
in tools/FakeRAM2.0/utils
17 3 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
tcl
extract_memories.tcl
in flow/scripts/memories
16 - 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
single_port_ssram.py
in tools/FakeRAM2.0/utils
15 3 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
dual_port_regfile.py
in tools/FakeRAM2.0/utils
14 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
dual_port_ram.py
in tools/FakeRAM2.0/utils
14 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
ram.py
in tools/FakeRAM2.0/utils
13 3 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
single_port_regfile.py
in tools/FakeRAM2.0/utils
12 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
reg_file.py
in tools/FakeRAM2.0/utils
12 3 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
memory_factory.py
in tools/FakeRAM2.0/utils
11 - 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
regfile_liberty_exporter.py
in tools/FakeRAM2.0/utils
8 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
exporter.py
in tools/FakeRAM2.0/utils
8 3 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
named_object.py
in tools/FakeRAM2.0/utils
5 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
__init__.py
in tools/FakeRAM2.0
2 - 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
__init__.py
in tools/FakeRAM2.0/utils
2 - 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
315 11 2026-07-31 2026-08-03 2 2 arthurkoucher@precisioninno... arthurkoucher@precisioninno...
tcl
123 - 2026-07-31 2026-08-08 5 3 arthurkoucher@precisioninno... mliberty@precisioninno.com
tcl
write_rc.tcl
in flow/util
14 - 2026-07-31 2026-08-03 2 2 arthurkoucher@precisioninno... 43450810+eder-matheus@users...
Most Recently Changed Files (Top 50)
File# lines# unitscreatedlast modified# changes
(days)
# contributorsfirst
contributor
latest
contributor
v
gcd.v
in flow/designs/src/gcd
449 -
v
cells_latch.v
in flow/platforms/nangate45
14 -
v
aes_cipher_top.v
in flow/designs/src/aes
1 -
v
aes_inv_cipher_top.v
in flow/designs/src/aes
1 -
v
aes_key_expand_128.v
in flow/designs/src/aes
1 -
v
timescale.v
in flow/designs/src/aes
1 -
tcl
global_route.tcl
in flow/scripts
145 - 2019-12-10 2026-08-12 279 57 rovinski@umich.edu oyvind.harboe@zylin.com
uploadMetadata.py
in flow/util
403 10 2023-02-28 2026-08-11 36 17 habibayassin@aucegypt.edu sombrio@sombrasoft.dev
tcl
123 - 2026-07-31 2026-08-08 5 3 arthurkoucher@precisioninno... mliberty@precisioninno.com
variables.yaml
in flow/scripts
1646 - 2024-10-03 2026-08-06 250 33 oyvind.harboe@zylin.com jeffng@precisioninno.com
tcl
synth_preamble.tcl
in flow/scripts
234 - 2021-09-23 2026-08-06 127 32 mathur.sanjiv@gmail.com emrmonteiro@precisioninno.com
detect.py
in flow/scripts/memories
151 3 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
schema.py
in flow/scripts/memories
146 8 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
gen_memories.py
in flow/scripts/memories
119 3 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
tcl
lec_check.tcl
in flow/scripts
72 - 2025-12-30 2026-08-06 21 11 noam.cohen@keplertech.io jeffng@precisioninno.com
tcl
load.tcl
in flow/scripts
49 - 2021-11-03 2026-08-06 95 31 mliberty@eng.ucsd.edu emrmonteiro@precisioninno.com
tcl
read_liberty.tcl
in flow/scripts
37 - 2021-09-21 2026-08-06 34 17 peter.gadfort.civ@army.mil emrmonteiro@precisioninno.com
idiomatic.py
in flow/scripts/memories
26 2 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
tcl
extract_memories.tcl
in flow/scripts/memories
16 - 2026-08-04 2026-08-06 3 3 oyvind.harboe@zylin.com emrmonteiro@precisioninno.com
liberty_exporter.py
in tools/FakeRAM2.0/utils
384 22 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
basic_port_creator.py
in tools/FakeRAM2.0/utils
193 10 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
spreadsheet_ram.py
in tools/FakeRAM2.0
188 8 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
class_memory.py
in tools/FakeRAM2.0/utils
147 32 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
verilog_exporter.py
in tools/FakeRAM2.0/utils
141 13 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
single_port_ram_verilog_exporter.py
in tools/FakeRAM2.0/utils
128 6 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
lef_exporter.py
in tools/FakeRAM2.0/utils
127 10 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
class_process.py
in tools/FakeRAM2.0/utils
119 28 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
ss_port_organizer.py
in tools/FakeRAM2.0/utils
94 7 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
v
fakeregfile_32x46.v
in flow/platforms/asap7/verilog
68 - 2023-07-09 2026-08-05 5 4 pchaiyakul@ucsd.edu mliberty@precisioninno.com
timing_data.py
in tools/FakeRAM2.0/utils
66 20 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
physical_data.py
in tools/FakeRAM2.0/utils
61 10 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
v
fakeram7_256x34.v
in flow/platforms/asap7/verilog
57 - 2023-08-15 2026-08-05 4 3 mliberty@precisioninno.com mliberty@precisioninno.com
v
fakeregfile_64x64.v
in flow/platforms/asap7/verilog
57 - 2023-07-09 2026-08-05 5 4 pchaiyakul@ucsd.edu mliberty@precisioninno.com
v
fakeram_64x22.v
in flow/platforms/asap7/verilog
57 - 2023-06-01 2026-08-05 4 4 64051352+louiic@users.norep... mliberty@precisioninno.com
v
fakeram7_64x21.v
in flow/platforms/asap7/verilog
57 - 2023-08-15 2026-08-05 4 3 mliberty@precisioninno.com mliberty@precisioninno.com
v
fakeram_512x8.v
in flow/platforms/asap7/verilog
57 - 2023-06-01 2026-08-05 4 4 64051352+louiic@users.norep... mliberty@precisioninno.com
v
fakeram7_256x256.v
in flow/platforms/asap7/verilog
57 - 2025-05-28 2026-08-05 5 4 jeffng@precisioninno.com mliberty@precisioninno.com
v
fakeram7_256x32.v
in flow/platforms/asap7/verilog
57 - 2023-08-15 2026-08-05 4 3 mliberty@precisioninno.com mliberty@precisioninno.com
v
fakeram_64x20.v
in flow/platforms/asap7/verilog
57 - 2023-06-01 2026-08-05 4 4 64051352+louiic@users.norep... mliberty@precisioninno.com
v
fakeram7_2048x39.v
in flow/platforms/asap7/verilog
57 - 2023-08-15 2026-08-05 4 3 mliberty@precisioninno.com mliberty@precisioninno.com
v
fakeram_32x46.v
in flow/platforms/asap7/verilog
57 - 2023-06-01 2026-08-05 4 4 64051352+louiic@users.norep... mliberty@precisioninno.com
v
fakeregfile_128x64.v
in flow/platforms/asap7/verilog
57 - 2023-07-09 2026-08-05 5 4 pchaiyakul@ucsd.edu mliberty@precisioninno.com
v
fakeram_256x64.v
in flow/platforms/asap7/verilog
57 - 2023-06-01 2026-08-05 4 4 64051352+louiic@users.norep... mliberty@precisioninno.com
v
fakeram_256x128.v
in flow/platforms/asap7/verilog
57 - 2023-06-01 2026-08-05 4 4 64051352+louiic@users.norep... mliberty@precisioninno.com
rw_port_group.py
in tools/FakeRAM2.0/utils
56 18 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
ram_verilog_exporter.py
in tools/FakeRAM2.0/utils
47 5 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
run_utils.py
in tools/FakeRAM2.0/utils
45 5 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
port.py
in tools/FakeRAM2.0/utils
35 12 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
single_port_ram_liberty_exporter.py
in tools/FakeRAM2.0/utils
35 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
run.py
in tools/FakeRAM2.0
34 2 2026-08-04 2026-08-05 2 1 mliberty@precisioninno.com mliberty@precisioninno.com
Summary
  • Number of files: 811
  • Daily file updates (only one update per file and date counted): 5640
  • First update: 2019-12-05
  • Latest update: 2026-08-12
  • Days between first and latest update: 2,442 (348 weeks, estimated 1,740 working days)
  • Active days (at least one file change): 1,941
  • Files without commit history (ignored): 6 (467 lines of code)
  • Data: