apache / tvm-vtaConditional Complexity

Intro

Conditional complexity (also called cyclomatic complexity) is a term used to measure the complexity of software. The term refers to the number of possible paths through a program function. A higher value ofter means higher maintenance and testing costs (infosecinstitute.com).
Conditional complexity is calculated by counting all conditions in the program that can affect the execution path (e.g. if statement, loops, switches, and/or operators, try and catch blocks...).
Conditional complexity is measured at the unit level (methods, functions...).
Units are classified in four categories based on the measured McCabe index: 1-5 (simple units), 6-10 (medium complex units), 11-25 (complex units), 26+ (very complex units).

Learn more...

Conditional Complexity Overall

There are 269 units with 3,309 lines of code in units (22.5% of code).

0 very complex units (0 lines of code)
2 complex units (311 lines of code)
5 medium complex units (335 lines of code)
15 simple units (572 lines of code)
247 very simple units (2,091 lines of code)

Legend:

51+

26-50

11-25

6-10

1-5

Alternative Visuals

3D view of all units

Conditional Complexity per Extension

51+

26-50

11-25

6-10

1-5

Conditional Complexity per Logical Component

primary logical decomposition

51+

26-50

11-25

6-10

1-5

Most Complex Units

Top 50 most complex units

Unit	# lines	McCabe index	# params
void vta() in hardware/xilinx/src/vta.cc	148	47	7
def main() in config/vta_config.py	163	41	0
void alu() in hardware/xilinx/src/vta.cc	61	14	6
void RunGEMM() in src/sim/sim_driver.cc	49	14	1
def set_attrs() in hardware/intel/scripts/set_attrs.py	35	12	4
bool program_rbf() in src/de10nano/de10nano_mgr.h	109	12	1
void compute() in hardware/xilinx/src/vta.cc	81	11	11
void OCLFPGADevice::free() in src/oclfpga/oclfpga_device.cc	13	10	1
bool TlppVerify::DependencyProcess() in src/sim/sim_tlpp.cc	28	10	11
int VTADPISim() in hardware/dpi/tsim_device.cc	68	9	0
def compile_mxnet_gulon_resnet() in apps/deploy/resnet_export.py	25	9	2
void gemm() in hardware/xilinx/src/vta.cc	60	8	6
def __init__() in config/pkg_config.py	175	7	2
void OCLFPGADevice::deinit() in src/oclfpga/oclfpga_device.cc	14	7	0
CORE_TYPE TlppVerify::GetCoreType() in src/sim/sim_tlpp.cc	23	7	2
void RunLoad() in src/sim/sim_driver.cc	16	7	1
void RunALU_() in src/sim/sim_driver.cc	36	7	1
void RunALULoop() in src/sim/sim_driver.cc	24	7	2
void fetch() in hardware/xilinx/src/vta.cc	32	6	5
void MemDevice::WriteData() in src/dpi/module.cc	27	6	2
focl_mem_off_t OCLFPGADevice::alloc() in src/oclfpga/oclfpga_device.cc	15	6	1
static void Run_Insn() in src/sim/sim_driver.cc	16	6	2
void load() in hardware/xilinx/src/vta.cc	56	5	7
def gen_target_name() in config/vta_config.py	11	5	1
void MemDevice::SetRequest() in src/dpi/module.cc	25	5	7
void MemDPI() in src/dpi/module.cc	52	5	14
vta_phy_addr_t VirtualMemoryManager::GetPhyAddr() in src/vmem/virtual_memory.cc	17	5	1
bool TlppVerify::InsnDependencyCheck() in src/sim/sim_tlpp.cc	31	5	2
void store() in hardware/xilinx/src/vta.cc	35	4	5
def firstOneOH() in hardware/chisel/src/main/scala/shell/VME.scala	14	4	1
def same_config() in config/pkg_config.py	7	4	2
def scalacOptionsVersion() in apps/gemm/hardware/chisel/build.sbt	15	4	1
def javacOptionsVersion() in apps/gemm/hardware/chisel/build.sbt	10	4	1
def scalacOptionsVersion() in apps/tsim_example/hardware/chisel/build.sbt	15	4	1
def javacOptionsVersion() in apps/tsim_example/hardware/chisel/build.sbt	10	4	1
int Run() in src/pynq/pynq_driver.cc	24	4	3
MemResponse MemDevice::ReadData() in src/dpi/module.cc	12	4	2
void done() in src/de10nano/de10nano_mgr.h	15	4	1
int Run() in src/de10nano/de10nano_driver.cc	16	4	3
void TlppVerify::CoreRun() in src/sim/sim_tlpp.cc	17	4	1
uint32_t GetUnsigned() in src/sim/sim_driver.cc	13	4	1
int32_t GetSigned() in src/sim/sim_driver.cc	16	4	1
void SetUnsigned() in src/sim/sim_driver.cc	14	4	2
void SetSigned() in src/sim/sim_driver.cc	14	4	2
void Load_int8() in src/sim/sim_driver.cc	33	4	4
void TruncStore() in src/sim/sim_driver.cc	19	4	2
void RunStore() in src/sim/sim_driver.cc	13	4	1
void reset_mem() in hardware/xilinx/src/vta.cc	12	3	3
void read_tensor() in hardware/xilinx/src/vta.cc	14	3	3
void write_tensor() in hardware/xilinx/src/vta.cc	15	3	3